French company SiPearl and Taiwan’s Egis Group have signed a strategic and investment agreement to jointly develop the Mobius100 (M100) CPU, which will serve as the foundation for the Rhea2, the second generation of Europe’s supercomputing processor. The deal was signed on October 22, 2026 in Taipei, witnessed by representatives of the Taiwanese and French governments, and the first published specifications point to 140 Arm Neoverse V3 cores, TSMC’s N3P process, and DDR5-12800 memory.
The SiPearl-Egis deal in 30 seconds
- Alcor Micro, an Egis subsidiary, is developing the M100 CPU on Arm Neoverse V3, and SiPearl will use it as the base for the Rhea2.
- The chip combines two 70-core chiplets built on TSMC’s N3P process: 140 cores in total, of which 128 remain active.
- It supports DDR5-12800 MRDIMM, PCIe 6.0, CXL, and eight UCIe 2.0 interfaces.
- Egis is joining SiPearl’s Series B funding round, with no public figure disclosed.
- Samples are expected by late 2027, with mass production in the second half of 2028.
The agreement combines Egis’s chip technology with SiPearl’s software and systems expertise, and includes joint expansion across Europe, the Middle East, and Africa. Egis is also joining SiPearl’s Series B funding round, though the amount invested hasn’t been made public.
Mobius100, the Foundation for the Rhea2
The Mobius100 is being developed by Alcor Micro on the Arm Neoverse Compute Subsystems V3 platform. Chip-to-chip interconnect technology comes from InPsytech, another company in the group. Philippe Notton, CEO of SiPearl, explained that they’ll use the platform for the second generation of their processor, which the company says will shorten the Rhea2’s development time. Notton added, according to VIPress, that Europe and Taiwan bring complementary strengths to the global supercomputing value chain.
Alcor Micro’s timeline puts tape-out (handing off the final design for manufacturing) in the first quarter of 2027, first samples by late 2027, and mass production in the second half of 2028. The joint statement cautions that those dates depend on development, validation, and customer needs. Both parties are also exploring collaboration on later chiplet generations.
140 Cores, N3P, and DDR5-12800
ComputerBase has published the first technical details of the M100. The processor combines two 70-core chiplets built on TSMC’s N3P process, adding up to 140 Arm Neoverse V3 cores. Of those, 12 are redundant to improve manufacturing yield, so the chip ships with 128 active cores, the same figure SiPearl had announced for the Rhea2 around a year ago. The cores support SVE2 vector instructions, and the design includes Caliptra 2.0 as a hardware root of trust.
On memory and I/O, the M100 works with DDR5-12800 MRDIMM modules, PCIe 6.0, and CXL, the standard for expanding memory and connecting accelerators with cache coherence. It also has eight UCIe 2.0-S interfaces for linking other chiplets within the same package. No clock speeds, power draw (TDP), or pricing have been published, so it isn’t yet possible to compare its performance with other server CPUs.
The Rhea2 already has a known destination. SiPearl was selected in November 2025 for France’s Alice Recoque exascale supercomputer, which Eviden will build. Its first generation, the Rhea1, made by TSMC, packs 80 Arm Neoverse V1 cores and will be part of the CPU cluster in Germany’s JUPITER supercomputer. As Cloud News reported in September, SiPearl delivered its first Rhea1 chips to Bull for Europe’s JUPITER supercomputer, and according to ComputerBase it has also sent samples to HPE as part of the OpenCUBE project.
Egis Wants to Build a Chiplet Marketplace
For Egis, the deal fits its strategy of building a platform that integrates specialized chips from different vendors, spanning everything from processor development to interconnect and design services. The company is preparing a Chiplet Marketplace built on the UCIe standard with I/O, compute, CXL memory, and post-quantum cryptography blocks. Chiplets, functional chips manufactured separately and joined within the same package, help cut redesign costs and combine different manufacturing processes, though, as CNA notes, they still need packaging, software, and system verification to work together.
Steve Lo, chairman of Egis, argued that AI and supercomputing have stopped revolving solely around individual nodes and are now looking at full platforms and ecosystems. Cindy Chen, of Alcor Micro, described the relationship as a long-term alliance. The signing was also attended by Lee Yi-ping, chairman of Alchip Technologies, Taiwan’s Minister of Economic Affairs, Kung Ming-hsin, Deputy Foreign Minister François Wu, and the director of the French Office in Taipei, Frédéric Laplanche, who presented the deal as a step toward closer cooperation between Taiwan and France on semiconductors and AI.
Frequently Asked Questions
What did SiPearl and Egis sign?
A strategic and investment agreement to develop the Mobius100 CPU and expand across Europe, the Middle East, and Africa. Egis is also joining SiPearl’s Series B funding round.
How many cores will the Rhea2’s CPU have?
The M100 packs 140 Arm Neoverse V3 cores across two 70-core chiplets, with 128 active and 12 redundant, according to ComputerBase.
When will the Mobius100 be ready?
Alcor Micro expects samples by late 2027 and mass production in the second half of 2028, subject to development and validation.
Where will SiPearl’s processors be used?
The Rhea1 is part of the CPU cluster in Germany’s JUPITER supercomputer, and the Rhea2 is slated for France’s Alice Recoque exascale system.
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