The scene said it all: in an auditorium in San Jose, California, surrounded by the industry’s major players in semiconductors and artificial intelligence, C.C. Wei, President and CEO of TSMC, repeated the same phrase three times: “It’s not enough, it’s not enough, it’s still not enough.” He was referring to the manufacturing capacity in advanced semiconductor nodes, the heart of GPUs and AI accelerators driving the new technological revolution.
The occasion was significant. Wei and TSMC’s former chairman Mark Liu had just received the Robert N. Noyce Award, the industry’s highest honor from the Semiconductor Industry Association (SIA), recognizing figures who have significantly shaped the sector. AMD, through its CEO Lisa Su, presented the award, capturing an image many interpret as the portrait of the “engine room” of global AI: chip design, advanced manufacturing, and compute power tightly intertwined.
Beyond the applause, Wei’s message was a direct warning to the market: even the world’s largest contract chip manufacturer cannot meet the demand for cutting-edge nodes required by generative AI.
An award recognizing decades of leadership at the “leading edge”
The Noyce Award is not a common accolade. It is awarded annually by the SIA to an individual (or, in this case, two) whose contribution has been decisive for the industry. In 2008, it was awarded to Morris Chang, founder of TSMC; now, the awarding of the honor to Wei and Liu solidifies Taiwan’s chipmaker as a pillar of the global chip ecosystem. Not only as a key supplier to companies like Apple, NVIDIA, AMD, Qualcomm, and major cloud providers, but as an entity that has defined the modern foundry model.
The SIA highlighted that these leaders bring over 80 years of combined experience in the industry, and that their work has “revolutionized semiconductor manufacturing” and reshaped the global supply chain.
This legacy is backed by a list of milestones:
- Sequential jumps to 7 nm, 5 nm, and 3 nm for mass production.
- Acceleration of plans for 2 nm, which TSMC expects to start volume production around 2026.
- Fabs expanding outside Taiwan, with facilities under construction or starting up in Arizona (USA), Kumamoto (Japan), and Dresden (Germany).
All within a foundry model that has enabled “fabless” designers like NVIDIA, AMD, and major cloud providers to launch increasingly complex products without bearing the manufacturing costs.
What does “capacity is not enough” really mean?
When C.C. Wei emphasizes that advanced processing capacity cannot keep up, he is not exaggerating. According to industry sources at the event, TSMC estimates that its capacity in advanced nodes—namely 7 nm and below, including 5 nm and 3 nm—is currently about three times below what its major clients wish to consume.
Several factors contribute to this gap:
- AI demand explosion:
- GPUs like NVIDIA H100/H200,
- Accelerators such as AMD MI300,
- Custom chips (ASICs) from Google, Amazon, Microsoft, or Meta,
rely heavily on TSMC’s most advanced nodes.
- Physical and equipment limitations:
- Next-generation EUV lithography tools, essential for 5 nm, 3 nm, and future 2 nm processes, are scarce and complex to produce.
- The necessary power infrastructure—gigawatts of stable electricity—and the availability of skilled personnel are additional bottlenecks.
- Time to ramp new factories:
- Plants in Arizona, Japan, and Europe won’t reach mass production of 3 nm or 2 nm before at least 2026. Until then, much of the demand for 2 nm remains concentrated in Taiwan, which is accelerating its rollout to meet AI’s demands.
In other words, although TSMC invests record sums in new facilities, the “AI curve” is growing faster than its ability to produce new wafers in advanced nodes.
From mobile to AI: changing chip consumption patterns
For over a decade, the main driver of demand for advanced nodes was high-end smartphones, with processors for laptops and PCs in second place. The shift to the AI era is reshaping this balance.
A single system for training large models can require thousands of GPUs or AI accelerators, each fabricated on 5 nm or 3 nm nodes, with massive chips demanding far more wafers per unit than a mobile SoC.
This is compounded by:
- The rise of generative AI in the cloud, where tech giants compete to expand their training and service clusters.
- The gradual arrival of AI at the edge: PCs with NPU, small-scale servers, industrial devices, and connected vehicles seeking local inference capabilities.
The result is that advanced nodes are no longer dedicated to just a few major markets; they become a transversal resource for nearly everything—from hyperscale data centers to ultralight laptops.
A phrase that summarizes industry tension
During his acceptance speech, Wei jokingly considered taking the stage in a T-shirt that read “No more wafers“, referring to the impossibility of meeting all client demands.
This joke encapsulates an uncomfortable reality for the entire ecosystem:
- GPU and accelerator manufacturers—NVIDIA, AMD, and emerging players—are competing for manufacturing slots on the same nodes.
- Cloud giants are reserving capacity years in advance, leaving less room for smaller players or new entrants.
- Any delays in building factories, supplying tools, or regulatory approvals can cause prolonged bottlenecks for strategic products.
The implicit message is clear: in the AI race, those who control access to advanced nodes have a structural advantage.
TSMC’s international expansion as a critical AI infrastructure
TSMC’s response involves doubling down on its geographic expansion. Wei reiterated his commitment to the United States as a strategic pillar, especially at a time when Washington seeks to reindustrialize parts of the chip value chain with public aid and a clear sovereignty agenda.
Meanwhile, the company is progressing in:
- Japan:
- Kumamoto plant in collaboration with local partners, initially focusing on mature nodes and progressively moving toward more advanced technologies.
- Europe:
- Project in Dresden (Germany), in coordination with European manufacturers and with institutional support to bolster the EU’s strategic autonomy.
This diversification reduces dependence on Taiwan alone but also reflects how governments view holding a stake in TSMC’s “manufacturing slice” as a matter of economic security and geopolitics.
An award with a warning for the industry
The double recognition of Wei and Liu comes amidst heightened supply chain tensions:
- US, Europe, Japan, South Korea, and China are ramping up their investments and subsidies in semiconductors.
- New AI chip design players are emerging almost every quarter.
- Major TSMC clients are negotiating better terms and priority access to the most advanced nodes.
By bluntly stating that capacity “is not enough”, Wei sends a message in two directions:
- To clients: the AI boom continues, but access to advanced silicon will remain limited and expensive, requiring years of planning.
- To governments: the industry needs more than just factory subsidies—regulatory stability, competitive energy, talent development, and resilient supply chains for critical equipment like EUV lithography.
Practically speaking, it’s an elegant way of saying that as long as AI demand remains unchecked, the bottleneck in advanced chips will continue to set the pace of innovation.
Frequently Asked Questions about TSMC, advanced node shortages, and AI
What does TSMC mean by “advanced processes,” and why are they so critical for AI?
When TSMC speaks of advanced processes, it generally refers to nodes 7 nm and below (including 5 nm, 3 nm, and upcoming 2 nm). These processes enable more transistors per area, with lower power consumption and higher performance. GPUs and AI accelerators require immense compute units and bandwidth—something only efficiently achievable on these leading-edge nodes.
Why does demand for advanced AI chips outweigh TSMC’s capacity so heavily?
Generative AI has shifted consumption patterns: instead of millions of relatively small mobile chips, now enormous accelerators for data centers are needed, consuming many more wafers per unit. Additionally, tech giants are racing to expand training and inference clusters, AI is increasingly entering PCs and edge devices, and physical and logistical constraints (EUV tools, energy, skilled workforce) rescreate a widening gap between market demand and manufacturing ability.
When are TSMC’s 2 nm fabs outside Taiwan expected to begin production?
Projects in the U.S., Japan, and Europe are at various stages, but industry analysts agree that mass production of nodes like 3 nm and 2 nm will not happen before at least 2026. Until then, significant 2 nm capacity will primarily come from Taiwan, which is accelerating its timeline to meet AI’s rapid growth.
How does this capacity shortage affect the GPU and AI accelerator markets?
Limited availability of advanced wafers acts as a natural brake on how fast AI clusters can grow. This results in:
- High prices and sometimes long lead times for top-tier GPUs.
- Increased pressure to optimize models, share infrastructure, and explore alternatives like in-house chips (TPUs, ASICs).
- An environment where priority access to TSMC’s capacity is a key competitive advantage for major players.
Sources: TSMC, Semiconductor Industry Association (SIA), specialized press, and financial media from Taiwan and the U.S. via: ctee.com.tw