The new specification aims to double bandwidth and meet the demands of artificial intelligence, quantum computing, and hyperscale data centers.
The organization PCI-SIG, responsible for developing the PCI Express (PCIe) architecture, has confirmed that the PCIe 8.0 specification is in development and plans an official launch in 2028. The new standard targets speeds of up to 256.0 GT/s, translating into 1 terabyte per second of bidirectional transfer in x16 configurations, solidifying PCIe as the backbone of high-performance connectivity for the coming years.
A quantum leap in performance
With each new generation, PCIe has doubled its speed, and version 8.0 will be no exception. This increase in transfer rate directly addresses the growing needs of sectors such as:
– Artificial intelligence and machine learning (AI/ML)
– High-speed networks and edge computing
– Quantum computing
– Advanced automotive systems
– High-performance computing (HPC)
– Hyperscale data centers
– Military and aerospace applications
The goal is to provide a scalable and efficient interconnection that supports massive data volumes, ultra-low response times, and guaranteed reliability.
Features expected in PCIe 8.0
According to the roadmap shared by PCI-SIG, version 8.0 will include the following advancements:
– Brute speed of 256.0 GT/s and up to 1 TB/s bidirectional in x16
– Backward compatibility with previous versions such as PCIe 7.0 and 6.0
– New connector technologies adapted to higher physical speed requirements
– Protocol enhancements to maximize useful bandwidth
– Power consumption reduction, key for sustainability and thermal efficiency
– Compliance with latency and FEC (Error Correction) objectives for critical environments
A framework shaping the digital age
Since its introduction in 2003, PCI Express has become the universal high-performance interconnection standard, present in all kinds of devices—from graphics cards and SSDs to embedded systems and servers. Its evolution has been constant and decisive in advancing modern computing.
The announcement of PCIe 8.0 reinforces industry commitment to continuous innovation and paves the way for new hardware architectures capable of meeting emerging workload demands such as foundational AI models, quantum simulations, or processing in distributed environments.
Next steps
PCI-SIG has indicated that the preliminary version of the specification will first be shared with its members. Throughout 2025 and 2026, technical reviews, connector validations, and interoperability tests will take place. The final release is scheduled for 2028, aligning with the adoption horizon for new hardware generations in key sectors.
Meanwhile, developers, manufacturers, and research centers interested in participating in defining the standard can join the organization and actively contribute to expanding the PCIe ecosystem.
With this roadmap, PCI-SIG reaffirms its role as the architect of future connectivity, driving a faster, safer, more efficient infrastructure prepared for the next wave of technological innovation.