Openchip & Software Technologies and SUSE have signed a memorandum of understanding to develop a European computing platform that connects RISC-V based processors with open-source enterprise software. The goal is to create a comprehensive infrastructure for AI, supercomputing, cloud, and sectors that require strict control over their data and systems.
The collaboration combines two elements that Europe typically develops separately. Openchip works on compute accelerators designed in Barcelona, while SUSE provides the operating system, Kubernetes, cluster management, and the tools needed to deploy enterprise applications. The agreement aims to ensure that future hardware doesn’t arrive on the market as an isolated component but as part of a validated platform ready to integrate into existing data centers.
Key points of the Openchip and SUSE agreement
- The companies have signed a memorandum of understanding, not a final product contract.
- SUSE will adapt and validate parts of its software for Openchip’s future processors and accelerators.
- The platform will include SUSE Linux Enterprise Server, RKE2, Rancher Prime, and SUSE AI Factory.
- Openchip will use RISC-V architectures oriented towards AI and high-performance computing.
- The work includes the RVA23 profile and its vector instructions.
- Virtualization capabilities for cloud environments will also be developed.
- Rancher will incorporate components to discover, monitor, and manage accelerators.
- The project targets data centers, government agencies, defense, telecommunications, healthcare, and financial services.
- The companies present the platform as a sovereign European alternative.
- Commercial launch dates, pricing, performance testing, and pilot customers have not yet been announced.
This announcement marks the beginning of a technical development process. Openchip still needs to complete and bring its devices into production, while SUSE must certify that the operating system, drivers, Kubernetes, and applications run stably on the new hardware.
The term “sovereign platform” does not imply that all components are already available or that the entire infrastructure will be manufactured within the European Union. This is one of the issues the project will need to clarify as it progresses toward commercial products.
From processor to cluster: why software is so crucial
Designing a processor is only part of the work needed to compete in data centers. Companies don’t buy an instruction set architecture and immediately start running applications. They need firmware, drivers, compilers, libraries, operating systems, virtualization, observability tools, and support for years.
This issue is especially evident with RISC-V. The architecture has quickly advanced in embedded devices, microcontrollers, and research projects but still has limited presence in enterprise servers compared to x86 and Arm.
A processor might offer strong theoretical performance but be of limited use without compatible software stacks, diagnostic tools, or easy cluster management. Openchip and SUSE aim to work from before launch to prevent hardware from appearing without a mature enterprise environment.
| Layer | Expected Contribution |
|---|---|
| Processor Architecture | RISC-V and accelerators designed by Openchip |
| Operating System | SUSE Linux Enterprise Server |
| Kubernetes | SUSE Kubernetes Engine, based on RKE2 |
| Cluster Management | SUSE Rancher Prime |
| AI Platform | SUSE AI Factory and Openchip software |
| Drivers and Libraries | Integrated with Openchip devices |
| Observability | Monitoring nodes, workloads, and accelerators |
| Virtualization | Support for cloud and workload consolidation |
| Security | Updates, policies, and an auditable supply chain |
| Support | Enterprise certification and maintenance |
The collaboration includes developing Kubernetes add-ons and operators capable of recognizing accelerators, assigning them to containers, and collecting metrics on their performance. This will be necessary so a company can share hardware among different teams without manually managing each server.
The model is similar to what Nvidia, AMD, and Intel already use. Their chips are not sold alone; they come with drivers, libraries, runtime environments, and tools that enable integration with Kubernetes, virtual machines, and AI platforms.
Openchip aims to build a European alternative, leveraging a provider already present in servers and cloud environments. SUSE, for its part, gains the ability to adapt its catalog to a new architecture before the first commercial systems are available.
One technical challenge will be supporting RVA23, a RISC-V profile designed to unify the minimal capabilities of 64-bit application processors. RISC-V allows many extensions, making it easier to create specialized chips, but this can lead to software fragmentation when different processors implement different instruction sets.
RVA23 defines a more predictable baseline on which developers can compile applications. Its notable features include the mandatory vector extension V, previously optional. These instructions enable processing multiple data points with a single operation and are relevant for linear algebra, scientific simulation, AI, and signal processing.
The RVA23 supervisor profile also includes extensions for hypervisors, necessary for running virtual machines and partitioning servers—a common requirement in cloud platforms.
Compatibility with the standard alone does not guarantee competitive performance. Speed depends on core design, memory, interconnects, accelerators, and compiler quality. The agreement with SUSE aims to ensure software can leverage these features, making evaluation more than just a silicon test.
European sovereignty doesn’t end with choosing RISC-V
Choosing RISC-V offers strategic advantages: its instruction set is open and can be implemented without dependency on x86 or Arm licenses. This allows Openchip to design processors tailored to its needs and to participate directly in hardware evolution.
However, RISC-V is not exclusively European. It is an international standard used by companies and research centers worldwide. What can contribute to sovereignty is control over the specific design, intellectual property, firmware, software, and product timeline.
Where chips are manufactured also matters. Openchip operates on a fabless model: designing circuits but relying on external foundries. It has considered suppliers in Taiwan, Europe, and Japan, so a processor designed in Barcelona won’t automatically be manufactured within the EU.
The supply chain also includes elements such as electronic design tools, memory, packaging, networking equipment, and manufacturing technologies—many of which come from non-European companies. A platform is more controllable than a fully closed solution but not isolated from global semiconductor supply chains.
| Sovereignty Dimension | Question the project must answer |
|---|---|
| Design | Who controls the processor architecture and intellectual property? |
| Manufacturing | In which country and foundry will the processors be produced? |
| Software | Can it be audited, modified, and maintained from within Europe? |
| Firmware | Is access to low-level code and updates available? |
| Data | Where are workloads stored and processed? |
| Operation | Which company controls the platform and its credentials? |
| Supply Chain | Which components depend on third-party countries? |
| Support | Can the system be maintained if a provider changes? |
| Security | How are vulnerabilities notified and fixed? |
| Continuity | Are there alternatives for the most sensitive parts? |
Open-source code helps in reviewing and maintaining a platform but does not automatically guarantee security. Security depends on code review, vulnerability management, signing updates, dependency control, and incident response capabilities.
The same applies to regulatory compliance. Openchip and SUSE believe the platform can help organizations subject to NIS2, DORA, and the Cyber Resilience Regulation. An auditable, maintained infrastructure with data control can facilitate compliance but does not automatically ensure it.
NIS2 requires managing risks and protecting networks and systems in critical sectors. DORA focuses on the technological resilience of the financial sector. The Cyber Resilience Regulation includes obligations for digital products. Companies must still conduct risk assessments, testing, vendor management, incident reporting, and documentation.
The agreement also coincides with the European Commission’s effort to align semiconductor investments with actual demand from data centers and public agencies. The package introduced on 06/03/2026 includes a review of the European Chips Act and the proposed Cloud and AI Development Regulation, known as CADA. Its aims include expanding European data center capacity and increasing control over the origin and technology in sensitive contracts. These measures still need negotiation with the European Parliament and member states before becoming law.
Openchip is well-positioned to benefit from this industrial policy. The company participates in the European DARE project, which aims to develop RISC-V processors, accelerators, and software for future European supercomputers, supported by the IPCEI microelectronics initiative.
Public support, however, raises expectations. The project must demonstrate it can produce competitive devices, meet timelines, and develop a platform that businesses are willing to adopt without relying solely on public procurement requirements.
Partnering with SUSE reduces one of the common risks for new processors: launching hardware before software is ready. Other challenges remain, including silicon availability, compilers, performance per watt, cost, and manufacturing capacity.
The significance of the agreement is not yet in creating an alternative to Intel, AMD, Arm, or Nvidia. Such an alternative doesn’t yet exist as a deployable product. The progress lies in recognizing that Europe cannot achieve technological sovereignty through isolated chips alone. It needs to integrate processor, OS, orchestration, AI tools, and support within a platform ready for production.
Frequently Asked Questions
What have Openchip and SUSE signed?
A memorandum of understanding to collaborate on adapting and certifying SUSE software for Openchip’s future RISC-V processors and accelerators.
Is the platform already available?
No. Companies have not announced availability dates, server models, prices, or independent performance results.
What does RISC-V contribute to technological sovereignty?
It enables designing processors based on an open architecture without depending on proprietary licenses from x86 or Arm. Full sovereignty also requires control over manufacturing, firmware, software, and operations.
Can this platform replace Nvidia or Intel?
It’s too early to say. The initial goal is to offer a European option for certain AI, HPC, cloud, and critical sectors workloads.
