The race for high-bandwidth memory (HBM) is heating up. Nvidia, the giant of graphics processors and artificial intelligence, is pushing its suppliers to go beyond the official standard of the next-generation HBM4. According to a TrendForce report cited by Tom’s Hardware, the company demands memory stacks capable of reaching 10 Gbps per pin, a speed higher than the 8 Gbps set by the JEDEC standardization body. The goal is clear: to enhance the power of its Vera Rubin platform, scheduled for 2026, and to counter the momentum of AMD’s upcoming MI450 Helios architecture.
A standard that falls short for Nvidia
HBM4, the fourth generation of this type of memory, features a 2,048-bit interface and an official speed of 8 Gbps per pin. This translates to nearly 2 TB/s of bandwidth per stack. However, Nvidia considers this speed may not suffice for its massive compute ambitions. Raising it to 10 Gbps would boost bandwidth per stack to 2.56 TB/s. With six stacks, each GPU could surpass 15 TB/s of raw bandwidth.
The strategy is significant. The Rubin CPX, the optimized configuration for more demanding inference loads, markets a performance of 1.7 petabytes per second in a full NVL144 rack. The higher the memory speed, the fewer compromises are needed elsewhere in the system to reach these dizzying figures.
Technical challenges: power, heat, and reliability
The jump from 8 Gbps to 10 Gbps isn’t risk-free. Increasing I/O speed involves higher energy consumption, tighter synchronization adjustments, and greater stress on the memory chip itself. All of these can escalate production costs and complicate mass validation.
Indeed, close sources suggest Nvidia might choose to segment its Rubin products based on the installed HBM type. The CPX models could utilize the faster 10 Gbps versions, while standard configurations stick with the official 8 Gbps. This strategy could control costs and keep production viable.
Samsung, SK Hynix, and Micron: competitors in the supply chain
In this race, memory suppliers play a crucial role. Samsung is particularly aggressive in transitioning manufacturing nodes. Its HBM4 base chip is migrating to 4 nm FinFET technology, a logic class that enables higher frequencies and lower dynamic power. This move could give Samsung an edge in the higher-end market segments, though SK Hynix still dominates in shipping volume.
Meanwhile, Micron has already confirmed it has samples of HBM4 with a 2,048-bit interface and bandwidth exceeding 2 TB/s, though it’s unclear if they aim for the 10 Gbps speeds Nvidia seeks.
Certification will be key. Nvidia is considering longer validation windows and phased supplier qualifications to ensure production deadlines are met, even if initial yields are low.
AMD’s counterattack: capacity and architecture
Meanwhile, AMD is preparing its counteroffensive with the MI450 Helios series. Although not yet on the market, some technical details are known. Each GPU will support up to 432 GB of HBM4 memory, giving it an advantage in capacity over Nvidia’s proposals.
Additionally, the new CDNA 4 architecture promises substantial improvements in AI computation and efficiency—key aspects for competing with Rubin in inference and large-scale model training. In other words, while Nvidia chases more speed, AMD also bets on more memory and a profound redesign of its architecture.
Rubin versus Helios: the decade-long showdown
The battle between Nvidia’s Rubin platform and AMD’s Helios could set the tone for the next major wave of AI hardware. It isn’t just about bandwidth or capacity but about delivering balanced solutions that meet the demands of increasingly large and complex models.
Nvidia, which currently leads the AI accelerator market by a wide margin, knows it can’t afford to lose ground. Its push to extend HBM4 beyond JEDEC limits reflects a clear strategy: maximize speed to maintain dominance in inference workloads and supercomputer scalability.
On the other hand, AMD might turn capacity and architectural efficiency into its strongest weapons. With Helios, it seeks not only to close the gap with Nvidia but also to attract clients who need larger datasets or models with trillions of parameters.
A battle with geopolitical and technological implications
Beyond the Nvidia vs. AMD rivalry, the evolution of HBM4 memory and the adoption of advanced manufacturing processes by Samsung, SK Hynix, and Micron have a geopolitical dimension. High-bandwidth memory has become critical for AI, big data, and military applications.
The United States, South Korea, and Taiwan dominate this value chain, adding pressure amid tensions with China and efforts to secure strategic semiconductor supplies. Every technological advance in this field could tip the balance not only in data centers but also in the global economy and bloc competition.
Conclusion: speed versus capacity
The scenario projected for 2026 is a direct confrontation. Nvidia bets on the extreme speed of 10 Gbps HBM4 to sustain its leadership. AMD, with its MI450 Helios, relies on offering more memory and architectural improvements to balance the scales.
The outcome will depend on technical, economic, and supply factors. The HBM4 battle will not only be about chips but also strategy, reliability, and future vision.
What’s clear is that whether or not 10 Gbps speeds are achieved, the next generation of memory and GPUs will mark an unprecedented leap in AI performance—pushing the industry toward a threshold where current supercomputers could soon become obsolete.
Frequently Asked Questions
What is HBM4 memory, and how does it differ from previous generations?
HBM4 is the fourth generation of high-bandwidth memory. It features a 2,048-bit interface and bandwidth surpassing 2 TB/s per stack, significantly improving over HBM3 and HBM3E figures.
Why does Nvidia want 10 Gbps HBM4 instead of the official 8 Gbps?
Reaching 10 Gbps per pin would give each GPU over 15 TB/s of bandwidth, ensuring higher performance for AI workloads, especially in inference and large model training.
How does AMD plan to compete with Nvidia in this field?
AMD is preparing the MI450 Helios series with up to 432 GB of HBM4 per GPU and architectural improvements in CDNA 4, aiming to offset Nvidia’s speed advantage with greater capacity and efficiency.
What role do Samsung, SK Hynix, and Micron play in this competition?
These companies are the main HBM4 suppliers. Samsung advances rapidly in migrating to 4 nm nodes, SK Hynix leads in production volume, and Micron has already shown samples exceeding 2 TB/s bandwidth.
via: tomshardware