Meta will begin manufacturing a new AI accelerator designed for its own data centers starting in September. The chip, internally known as Iris, is part of a broader initiative to reduce costs, rely less on Nvidia, and tailor hardware to the specific needs of Facebook, Instagram, WhatsApp, and the company’s AI models.
This move brings together several companies shaping the next generation of custom processors. Meta defines the architecture, Broadcom is involved in the design, and TSMC handles turning it into silicon. Meanwhile, MediaTek is trying to establish itself in the same ASIC market for data centers and has been linked to developing future chips for Google.
Therefore, there is no formal alliance between Meta, MediaTek, and TSMC against Google. The reality is more interesting: these suppliers can work for competing companies, as each major platform seeks to build its own infrastructure that reduces dependence on general-purpose GPUs.
Key Points of the AI Chip Race in 20 Seconds
- Meta plans to start production of Iris, its next in-house accelerator, in September.
- The chip is part of the MTIA program, focused on training and inference of models.
- Broadcom collaborates with Meta on design, and TSMC will handle fabrication.
- Iris will complement Nvidia and AMD GPUs, not fully replace them.
- Meta aims to release a new generation of chips approximately every six months through 2027.
- The company intends to reach 14 gigawatts of computing capacity by 2027.
- Google has been developing TPUs for over a decade and is already preparing its eighth generation.
- MediaTek expects to earn $2 billion from data center chips in 2026.
- TSMC manufactures AI chips for nearly all players, including Nvidia, AMD, Google, Meta, Amazon, and Microsoft.
- The real common rival remains cost, energy consumption, and Nvidia dependence.
The arrival of Iris marks a significant advance for a project that hasn’t always met Meta’s timelines. According to an internal memo, testing of the new design was completed in about six weeks without major issues. The company plans to use it to expand AI capabilities across its social networks and offload some tasks from GPUs to more efficient, specialized circuits.
This strategy does not mean stopping purchases of Nvidia or AMD processors. Meta will still need large quantities of GPUs to train general models and experiment with rapidly evolving architectures. In-house chips are better suited for repetitive, stable tasks at massive scale, where small improvements in energy efficiency or cost per operation can save hundreds of millions.
Iris: Meta’s Response to Escalating Computing Costs
Meta is preparing to spend up to $145 billion on AI infrastructure by 2026. The figure includes data centers, servers, networks, memory, storage, and processors. The company reports adding one gigawatt of capacity in the first half of the year and expects to add another 2.5 gigawatts before year-end. Its goal is to reach 14 gigawatts in 2027.
At this scale, solely purchasing the most advanced available hardware becomes insufficient. Each new GPU generation requires modifications to servers, cooling, networks, and software. Meta’s internal memo acknowledges that adopting the latest processors in such a large infrastructure demands significant effort and may delay deployments.
An ASIC like Iris sacrifices some flexibility for increased efficiency in specific tasks. It can eliminate unnecessary functions, optimize data movement, and align with software that Meta expects to run for years.
| Platform | Own Chip | Main Partners | Goal |
|---|---|---|---|
| Meta | MTIA / Iris | Broadcom and TSMC | Reduce training and inference costs |
| TPU | Broadcom, MediaTek, and external foundries | Support Gemini and sell capacity on Google Cloud | |
| Amazon AWS | Trainium and Inferentia | Design and manufacturing partners | Offer an in-house alternative to Nvidia |
| Microsoft | Maia | External suppliers | Accelerate AI services on Azure |
| Nvidia | GPUs and full systems | TSMC and memory manufacturers | Maintain leadership as a general platform |
| AMD | Instinct | TSMC | Compete with Nvidia in open accelerators |
Meta has a multi-year agreement with Broadcom covering several generations. Broadcom’s expertise includes physical chip design, high-speed interconnections, and translating the architecture into cost-effective, manufacturable circuits.
This model—common among hyperscalers—sees platforms knowing which workloads they want to accelerate but lacking all the in-house resources to complete the design, validate interfaces, manage packaging, and coordinate fabrication.
TSMC appears at the end of most such supply chains. The Taiwanese foundry doesn’t need to decide which architecture will win; it produces for Nvidia, AMD, Google, Meta, Microsoft, and Amazon. As more companies develop their own chips, demand for advanced nodes and packaging technologies will grow accordingly.
MediaTek Aims to Move Beyond Mobile Devices
MediaTek has built much of its business around processors for smartphones, TVs, routers, and connected devices. Expanding into AI ASICs offers the chance to secure larger contracts with different margins.
The company has doubled its revenue forecast for data center chips in 2026 to $2 billion. It also estimates that the market for custom AI chips could reach between $70 billion and $80 billion by 2027, aiming to capture between 10% and 15% of that market.
MediaTek states it can work with both TSMC’s advanced CoWoS packaging—widely used for AI accelerators—and Intel’s EMIB technology. Such flexibility allows clients to allocate production across different suppliers or choose the most suitable solution based on availability and design factors.
Two industry sources have linked MediaTek to future custom processors for Google, though the Taiwanese company has not publicly confirmed the client. Rather than challenging Google directly, MediaTek could serve as a partner aiding in the production of Google’s TPUs.
Google is also exploring diversification strategies. TSMC would continue fabricating the main component of a future chip called Icefish, while Samsung might handle certain memory interface components using its 2nm process. The design, which would involve MediaTek, could reach volume production around 2028—though these plans are not yet officially confirmed.
Google Maintains the Edge for Being First
While Meta can develop a capable accelerator, it remains years behind Google as a complete platform.
Google started deploying its first TPU internally as early as 2015. Since then, it has developed multiple generations of chips, optical networks, cooling systems, compilers, libraries, and entire supercomputers built around its architecture.
Its advantage isn’t just in silicon. It includes tight integration with TensorFlow, JAX, and PyTorch, Google Cloud’s infrastructure, and extensive experience running search, recommendations, translation, and the Gemini models at scale.
A technical publication from 2026 details the evolution from TPU v2 to Ironwood, noting a tenfold increase in HBM memory capacity and bandwidth per node, a hundredfold boost in maximum per-node performance, and a 3,600-fold increase in supercomputing capacity.
Google also unveiled its eighth-generation TPU, split into two chips. TPU 8t focuses on training, while TPU 8i centers on inference. The training system can assemble up to 9,600 processors and nearly two petabytes of high-bandwidth memory. Both designs are expected to be available via Google Cloud in 2026.
Meta still needs to demonstrate that Iris can achieve good manufacturing yields, be deployed across thousands of servers, and deliver an economic advantage considering development, software, and operations. Making the chip is just the first step.
It will also require building a stable ecosystem of tools, compilers, drivers, networks, and maintenance processes. An isolated accelerator can pass a test; a platform must operate reliably for years and support models that don’t yet exist.
Immediate Goal: Less Dependence on Nvidia, Not Just Google
The primary rivalry isn’t currently between Meta and Google. Both continue purchasing large quantities of Nvidia GPUs and can run certain workloads on their own chips.
Nvidia offers a flexible, mature, and widely compatible platform—CUDA, libraries, NVLink interconnects, and complete systems—that allows clients to deploy new models without waiting years for custom hardware.
Custom chips are attractive when workloads are stable and substantial. In inference, recommendations, advertising, and certain internal models, efficiency can outweigh flexibility.
| Factor | Nvidia GPU | Custom ASIC |
|---|---|---|
| Flexibility | Very high | Limited to defined workloads |
| Deployment time | Fast if supply is available | Several years of design and validation |
| Initial cost | High purchase price | Very costly development |
| Economies of scale | High | Potentially lower |
| Software ecosystem | Large and mature | Needs to be built or adapted |
| Model updates | Easier to adopt | May require new generation | Dependence | On Nvidia and its schedule | On design partners, TSMC, and memory |
Nvidia’s threat isn’t that Meta will abruptly stop buying GPUs. It arises as hyperscalers shift increasing parts of their repetitive workloads to own processors.
Even then, the total market can continue to grow enough for Nvidia to increase sales. Companies like Meta, Google, Amazon, and Microsoft need so many machines that ASICs can gain market share while overall GPU purchases keep rising.
TSMC will be a key beneficiary of both trends. It manufactures chips for Nvidia and AMD as well as many custom accelerators for Google, Meta, Amazon, and Microsoft. Rising energy costs are also pushing all designers to seek improvements that go beyond transistor size reduction.
TSMC expects that transitioning from its current N2 process to the future A14 node could reduce energy consumption by up to 30% and boost performance by over 20%. It is also expanding advanced packaging, 3D stacking, and photonics to move data more efficiently with less energy.
Meta is entering a crucial phase. Iris could prove that the MTIA program has overcome earlier delays and that the company can sustain a six-month cycle for new generations. Still, Google’s experience surpasses a decade, and Nvidia maintains the most complete ecosystem.
The race won’t have a single winner. Data centers will combine GPUs, TPUs, MTIA chips, and other ASICs based on workload. The advantage will go to whoever achieves the most useful work per watt and dollar, without being locked into hardware that can’t keep pace with evolving models.
Frequently Asked Questions
What is Iris, Meta’s new chip?
It is the internal name for an AI accelerator part of the MTIA program. Meta plans to start manufacturing it in September 2026.
Will Meta stop buying Nvidia GPUs?
No. Iris is designed to complement Nvidia and AMD GPUs, mainly in workloads where a custom chip can be more efficient.
Does MediaTek compete with Google?
MediaTek aims to compete in the ASIC design market but has also been linked to future chips for Google. It can act as a supplier for companies that compete with each other.
Why does TSMC succeed despite the proliferation of in-house chips?
Because it manufactures Nvidia and AMD GPUs along with numerous custom accelerators for Google, Meta, Amazon, and Microsoft.

