Intel Reclaims EMIB as a Crucial Piece for Scaling AI Beyond the Chip

The race in artificial intelligence is not only being decided by transistor counts, nanometer processes, or raw GPU power. Increasingly, the differentiating factor is how the various components are connected within a single system: compute chips, memory, accelerators, switches, and new chiplet-based architectures. In this arena, advanced packaging has stopped being a secondary part of semiconductors and has become a strategic technology.

Intel emphasizes this idea by highlighting Ravi Mahajan, an Intel Fellow and Director of Substrate and Advanced Packaging Pathfinding at Intel Foundry, one of the technical figures behind EMIB, or Embedded Multi-die Interconnect Bridge. This technology enables the connection of multiple chips within the same encapsulation using small silicon bridges embedded in the substrate, achieving interconnection densities higher than traditional approaches.

Mahajan’s explanation comes at a moment when AI is pushing the industry toward increasingly complex designs. It’s no longer sufficient to produce larger monolithic chips. Physical, economic, and thermal limits necessitate combining several specialized pieces into a single system. And for that combination to work, packaging is as important as the fabrication node itself.

From Physical Support to System Design

For decades, packaging was understood as a layer of protection and connection. Its role was to encase the silicon, facilitate electrical contact with the board, and help dissipate heat. It was important, but rarely was it the focus of technological discussion. That perspective has changed.

Mahajan recalls that when he joined Intel over 30 years ago, the industry was concerned with dissipating just a few watts. Today, advanced systems can handle loads on the scale of kilowatts. This evolution explains why design can no longer focus solely on the individual chip. The entire system must be considered: how energy moves, how data travels, how memory and compute blocks connect, and how reliability is maintained as complexity grows.

EMIB originated precisely from this need. Intel began exploring in the early 2000s whether packaging could have its own scaling method. The challenge was interconnection density: how many signals could efficiently enter and exit a chip. Traditional solutions were not advancing quickly enough for future designs, so the team proposed embedding silicon interconnects directly within the package.

The concept seemed simple on paper: use a small piece of silicon embedded in the substrate to connect chips with a very fine step. But bringing it into production required solving problems related to materials, mechanical stresses, manufacturing, and reliability. Intel started implementing EMIB in production trials in 2013 and publicly introduced it the following year.

Why AI Needs Advanced Packaging

Modern AI is limited by a fundamental challenge: moving data. Large models not only require more computational capacity but also need higher memory bandwidth and more efficient connections between system blocks. In many workloads, energy and time are spent not just on computation, but on transporting data to where it must be processed.

Advanced packaging allows these components to be brought closer together. Instead of relying on a single, massive chip, manufacturers can combine multiple optimized chiplets for different functions. Some blocks may be fabricated on advanced logic nodes, others on different nodes for I/O, memory, or specialized acceleration. The key is connecting them with sufficient density and efficiency to operate as an integrated system.

This is where EMIB offers an alternative to other interconnection approaches. Instead of using a full silicon interposer under all chips, it employs small bridges only where matrix connections are needed. This can reduce complexity and cost, while enabling high-density communication between closely situated components.

For Intel Foundry, the message is clear: customers are no longer just designing chips; they are designing systems. Advanced packaging enables them to surpass reticle size limits, mix technologies, use different nodes, and combine components from various suppliers if the design requires.

The New Bottleneck: Energy, Heat, and Interconnection

Advances in packaging are not without challenges. As interconnection density grows, so does the complexity of materials, assembly, power delivery, thermal dissipation, and validation. A system with multiple chiplets must not only perform well; it must do so reliably over years and with acceptable manufacturing yields.

Energy has become one of the major hurdles. Delivering power efficiently to multiple components within a single encapsulation is as critical as moving data. If the system loses too much energy along the way or cannot dissipate the heat generated, the theoretical performance becomes irrelevant.

Intel maintains that its advantage lies in bringing these technologies from research into high-volume manufacturing. Advanced packaging is not just about prototyping; it requires industrial infrastructure, process control, material expertise, design tools, and the capability to reproduce results at scale.

Mahajan also emphasizes collaboration as a necessary condition. Advanced packaging depends on materials, equipment, standards, design, software, and manufacturing. No single company can handle everything alone. The industry must coordinate better to ensure chiplets and new architectures progress with less friction.

Glass, Optics, and the Future of Packaging

The next decade will not be defined solely by EMIB. Intel is exploring new avenues such as optical interconnects, co-packaged optics, and glass substrates. All aim to address the same core problem: how to scale systems without data movement, heat, or power consumption becoming insurmountable barriers.

For example, glass substrates potentially offer advantages in dimensional stability, interconnection density, and scalability over traditional organic materials. Integrated optical connections near the package could help transfer data faster and with less energy in increasingly large systems.

Underlying this is the realization that Moore’s Law alone can no longer carry the entire burden of progress. The industry will continue shrinking transistors where possible, but performance at the system level will increasingly depend on how different components are combined. EMIB is one such solution: not making bigger chips at any cost, but connecting multiple chips more intelligently.

For AI, this transition is especially significant. Increasingly large models, critical memory, and data centers demanding better performance per watt make advanced packaging less about spectacle and more about viability, consumption, and scalability.

Intel wants to remind us that part of this battle has been ongoing in a domain where it has invested for years. If future computing relies on chiplets, proximity memory, dense interconnects, and increasingly complex packages, technologies like EMIB will shift from niche solutions to foundational elements of modern architecture.

Frequently Asked Questions

What is Intel’s EMIB?
EMIB is an advanced packaging technology that uses small silicon bridges embedded in the substrate to connect multiple chips within a single package.

Why is it important for artificial intelligence?
Because AI requires moving large volumes of data between compute and memory. Densely interconnected and efficient links help increase bandwidth and reduce energy consumption.

What’s the difference between a monolithic chip and a chiplet-based design?
A monolithic chip integrates everything into a single piece of silicon. A chiplet design combines various specialized blocks within one package.

What technologies could define the future of advanced packaging?
Intel highlights areas like scalable interconnects, co-packaged optics, and new materials such as glass substrates.

via: newsroom.intel