Intel used Hot Chips 2026 to show more of Diamond Rapids, the next generation of Xeon server processors. The company confirms a top configuration of up to 256 performance cores, 1.28 GB of last-level cache, 16 memory channels, and 128 PCIe 6.0 lanes, a mix meant to shore up its place in data centers as pressure from AMD, Arm, and hyperscaler-designed chips keeps growing.
Intel Diamond Rapids in 20 seconds
- Diamond Rapids will arrive in 2027 as the next generation of Intel Xeon.
- The top configuration reaches 256 cores and 1.28 GB of LLC cache.
- It will have 16 memory channels, DDR5-8000, and MRDIMM up to 12,800 MT/s.
- It will bring 128 PCIe 6.0 lanes and CXL 3.0.
- Intel will use its 18A-P process and advanced Foveros Direct 3D packaging.
The August 24 presentation also settled one of the open questions about the chip. Earlier reports capped it around 192 cores, but Intel showed a configuration reaching up to 256 cores at Hot Chips. That matters against AMD’s next EPYC generation and the growing supply of Arm CPUs for data centers.
Diamond Rapids will also be a big test for Intel Foundry. The compute chiplets use Intel 18A-P, an evolution of the 18A process Intel is pouring money into to win back its edge in manufacturing.
Intel places the new Xeon inside a wider AI strategy. At Hot Chips it also showed the Crescent Island GPU for inference and its Wildcat Lake architecture for client devices and edge computing. But Diamond Rapids has a different job: keep the x86 CPU relevant in servers where much of the spending growth is going to accelerators.
Up to 256 cores and a more complex chiplet design
The top configuration Intel announced combines four compute blocks and reaches 256 cores. The processor also carries up to 1.28 GB of last-level cache (LLC).
The design shows how server CPUs have turned into systems built from many pieces of silicon.
The package shown at Hot Chips integrates two Fabric Hub Tiles, 16 core chiplets, and four base tiles. The compute chiplets connect to the lower tiles through Foveros Direct, Intel’s direct chip-to-chip bonding.
The Fabric Hubs matter because they centralize much of the processor’s communication. Each also carries up to 16 MB of I/O cache and two accelerator complexes with technologies like Intel QuickAssist Technology (QAT), Data Streaming Accelerator (DSA), and In-Memory Analytics Accelerator (IAA).
Intel also rearranged the processor physically. The architecture moves the compute blocks to the sides and concentrates memory and I/O in other parts of the package.
This modular approach lets Intel build different configurations by reusing common blocks, a strategy AMD has long used with its chiplet-based EPYC processors.
Diamond Rapids also adds new instructions called spill-and-fill optimization instructions. The changes include going from 16 to 32 general-purpose integer registers and adding new three-operand instructions. Intel keeps compatibility with existing x86 software, though some applications will need recompiling to use the new features.
Memory will be a key weapon for Diamond Rapids
Core count is only part of the story.
Intel is putting real focus on memory bandwidth, which matters more and more for databases, high-performance computing (HPC), virtualization, and some AI workloads.
Diamond Rapids will have 16 DDR5 memory channels, up from the lower counts in earlier generations.
The platform will support DDR5 up to 8,000 MT/s and second-generation MRDIMM modules that reach 12,800 MT/s.
MRDIMM (Multiplexed Rank Dual Inline Memory Module) uses several memory ranks working together to push transfer rates to the controller higher. For Intel, that raises bandwidth a lot without resorting to specialized memory like HBM.
Connectivity moves forward too.
Diamond Rapids will offer 128 PCI Express 6.0 lanes, plus support for Compute Express Link (CXL) 3.0 and UPI 3 for processor-to-processor communication. It also includes eight PCIe 4.0 lanes.
CXL can be especially useful in large servers, letting memory and accelerators connect through a coherent architecture. Expanding or sharing memory matters more as AI datasets grow.
Intel also improved power management. Diamond Rapids adds new low-power states that can keep the L2 cache, mechanisms to prioritize specific cores in turbo mode, and better memory thermal management.
Intel needs more than a lot of cores
Diamond Rapids arrives at a tough moment for Intel.
Recent Mercury Research data for Q2 2026 puts AMD at about 34.5% of x86 server CPU units, against Intel’s 65.5%. The gap widens once you adjust for certain reporting differences between the two companies’ data center products.
And the competition isn’t just AMD anymore.
AWS builds Graviton, Google has Axion, Microsoft offers Cobalt, NVIDIA is coming in with Vera, and Qualcomm is preparing a return to server processors. Arm also showed its chiplet-based AGI architecture at Hot Chips, while Fujitsu introduced MONAKA. The conference lineup itself shows how varied the market has become.
AI is speeding up the shift. Large data center operators can justify building custom silicon when they deploy hundreds of thousands of servers and know exactly which workloads they’ll run.
Intel’s answer pairs general-purpose CPUs with accelerators and specialized architectures.
It frames Diamond Rapids as a platform to orchestrate enterprise and AI workloads, and keeps Crescent Island for inference. The idea is for CPU, GPU, and other accelerators to work together in the same data center, rather than leaning only on GPU-based AI.
Intel is also working with NVIDIA on a custom Xeon integrated with NVLink, confirmed as part of its plan for AI nodes.
Diamond Rapids will also have to prove Intel 18A-P is competitive.
By Intel’s numbers, the process is designed to give about 9% more peak performance than 18A, or cut power by roughly 18% at the same performance. Those are the manufacturer’s estimates; real server results will only show up once products ship.
The timeline is another challenge. Intel now targets Diamond Rapids for 2027, even as the data center CPU market keeps moving fast. It has said Coral Rapids will follow, aiming to bring back multithreading in its server architecture.
That’s why the 256 cores shown at Hot Chips are notable but not enough on their own to judge the product. Per-core performance, power efficiency, price, availability, effective memory bandwidth, and rack-level performance will all count too.
Diamond Rapids signals a much more ambitious Xeon in the works. The real answer will come once these processors can be compared in commercial systems against the next EPYC chips, new Arm CPUs, and the custom silicon the big cloud operators run in their own data centers.
Frequently Asked Questions
How many cores will Intel Diamond Rapids have?
Intel showed configurations of up to 256 cores at Hot Chips 2026, with up to 1.28 GB of last-level cache.
When will Diamond Rapids launch?
Intel targets 2027 for its next-gen Xeon Diamond Rapids. It hasn’t given an exact commercial release date yet.
What memory will Diamond Rapids use?
The platform will have 16 memory channels and support DDR5 up to 8,000 MT/s, along with second-generation MRDIMMs reaching 12,800 MT/s.
Will Diamond Rapids use Intel 18A?
Yes, the compute chiplets use Intel 18A-P, an evolution meant to improve performance and efficiency over the original 18A process.
