Cadence has introduced AuraStack AI Super Agent, a platform of agentic artificial intelligence for designing advanced printed circuit boards and encapsulations. The system runs on Allegro AI Studio, coordinates specialized agents, and combines planning, routing, electrical, thermal, and mechanical analysis within a single workflow. Nvidia and TSMC are already collaborating with Cadence to apply these capabilities to AI infrastructure and multi-chip systems.
AuraStack AI key points in 30 seconds
- AuraStack coordinates specialized agents during PCB and encapsulation design.
- Cadence claims it can double the time-to-market speed and increase productivity by 15 times.
- The platform integrates thermal, electromagnetic, mechanical, and signal/power integrity analysis.
- Nvidia uses it in workflows for AI infrastructure, and TSMC employs it in 3DFabric encapsulations.
- The reported improvements come from Cadence and its partners, not from independent testing.
The company aims to address a less visible part of artificial intelligence expansion. Designing an advanced GPU isn’t enough: it also requires connecting multiple chips, memory, power supplies, networks, and cooling systems within an encapsulation and a board that can be manufactured, operate reliably, and handle high power densities.
Cadence states that engineers spend around 65% of their time moving between tasks, tools, checks, and teams rather than working directly on the design. AuraStack aims to reduce this time by using agents capable of coordinating processes previously carried out in separate applications and departments.
The bottleneck is no longer only inside the chip
Advanced semiconductor manufacturing has evolved towards architectures composed of multiple components. An AI accelerator can combine compute chips, high-bandwidth memory, I/O interfaces, and high-speed links within a single package.
This structure allows building larger systems than a single monolithic circuit but shifts some complexity to the encapsulation and board. Each connection affects power consumption, temperature, signal integrity, and mechanical resistance.
| Design Area | Problem to Solve |
|---|---|
| System Planning | Distribute chips, memory, power, and connections |
| Component Placement | Avoid interference and optimize space |
| Routing | Connect thousands of signals with precise lengths and rules |
| Signal Integrity | Maintain stable communications at high speed |
| Power Integrity | Provide consistent power without excessive voltage drops |
| Thermal Design | Extract heat from chips and regulators |
| Mechanical Analysis | Study deformations, vibrations, and fatigue |
| Manufacturability | Ensure the design can be produced reliably |
Making one change in one area can negatively impact another. Placing two components closer reduces connection length but can concentrate more heat. Altering the power distribution might improve voltage levels but reduce available space for signals.
Design requires multiple rounds of simulation and correction. Electrical, thermal, and mechanical teams often work with their specific tools and share results at key moments. When a problem appears late, it may require redoing significant parts of the project.
AuraStack aims to keep these analyses in a continuous cycle. Agents can examine the design, run simulations, identify constraints, and suggest modifications before reaching the final validation stage.
Cadence presents the product as the first agentic platform specifically for printed circuit boards and advanced encapsulation. This is a commercial branding choice. While automation and AI tools exist in electronic design, AuraStack distinguishes itself by coordinating multiple agents and physical domains within a single environment.
What AuraStack AI Super Agent automates
| Stage | Features Included by Cadence |
|---|---|
| System Definition | Planning, requirements, constraints |
| Design Creation | Physical structure and IP reuse |
| Placement and Routing | Component distribution and connections |
| Electrical Analysis | Signals, power, electromagnetic fields |
| Thermal Analysis | Temperature and heat transfer |
| Mechanical Analysis | Stress, vibration, fatigue |
| Validation | Pre-production checks |
| Optimization | Comparison and fine-tuning of alternatives |
The platform runs on Allegro AI Studio and leverages Nvidia Blackwell infrastructure with CUDA-X to accelerate some calculations. Cadence has not detailed hardware requirements, power consumption, or licensing models for AuraStack.
Agents coordinate simulations but do not replace engineering expertise
AuraStack uses specialized agents for different tasks. One agent might handle routing, while others review signal integrity, thermal performance, or mechanical behavior. A higher-level agent coordinates the workflow and uses design intent to decide which analyses to run.
Cadence integrates several existing tools into the platform:
| Cadence Tool | Function |
|---|---|
| Celsius Thermal Solver | Thermal simulation and analysis |
| Clarity 3D Solver | 3D electromagnetic analysis |
| Sigrity X | Signal and power integrity |
| MSC Nastran | Structural analysis via finite elements |
| MSC Marc | Linear and nonlinear mechanical analysis |
| Allegro AI Studio | PCB design environment and automation |
The novelty isn’t just in executing these applications via natural language. AuraStack aims to use their outputs to modify and re-evaluate the design in a coordinated manner.
For example, the system could detect excessive electrical losses on a route, suggest an alternative, and then evaluate how that affects temperature and mechanical stresses. This process would repeat until a solution meeting all constraints is found.
Cadence claims AuraStack can halve design time-to-market and boost productivity up to 15 times. These figures represent the manufacturer’s communicated potential and depend on project specifics, data quality, team expertise, and automatable tasks.
| Reported Improvement | Attribution |
|---|---|
| Reduced time-to-market | Up to 2x |
| Increased productivity | Up to 15x |
| Multiphysics performance with Millennium M2000 | Up to 20x |
| Sustrate routing productivity with TSMC | Up to 100x |
| Component placement for FORVIA HELLA | From four days to four minutes |
The metrics are not directly comparable. The 15x increase refers to AuraStack’s overall proposition, while the 100x figure relates to a specific years-long collaboration between Cadence and TSMC automating substrate routing.
FORVIA HELLA provides another example. The company ensures that a task of placing 300 components, which previously could take up to four days, can now be completed in four minutes using AI-assisted placement technology. This does not mean the entire board design takes four minutes—just that one operation within a larger process.
Human review remains essential. Agents can generate alternatives and speed up simulations, but engineers must define limits, verify results, and take responsibility for designs that will be manufactured at scale.
Errors may lead to a new revision, known as a respin. In complex products, this can delay launches, consume additional wafers, and require changes in manufacturing workflows.
AuraStack aims to identify these issues earlier, when modifying a trace, repositioning a component, or changing a constraint still incurs lower costs.
Nvidia and TSMC bring AuraStack to AI infrastructure
Nvidia is using Cadence technology to automate and improve system design workflows. The company combines AuraStack with Millennium M2000, Cadence’s supercomputer dedicated to engineering simulation.
According to Nvidia, both platforms deliver up to 20 times more performance in multiphysics analysis. This comparison is based on the participating companies and the announcement does not specify configurations, reference models, or absolute times used.
For Nvidia, the benefit lies in designing complete systems. Its AI platforms need to connect accelerators, CPUs, HBM memory, switches, data processing units, power supplies, and cooling. Chip performance can be limited if the board or encapsulation cannot effectively transfer data and energy.
TSMC works with Cadence on implementing encapsulations for its 3DFabric family. These technologies enable the integration of multiple chips through advanced interconnects and are used in AI and high-performance computing systems.
| Partner | Reported Use |
|---|---|
| Nvidia | System automation and optimization for AI infrastructure |
| TSMC | Design and verification of 3DFabric encapsulations |
| Socionext | Encapsulation and board automation |
| FORVIA HELLA | AI-assisted placement in automotive electronics |
| Schneider Electric | Automation and capturing expert knowledge |
TSMC states that its collaboration with Cadence on automatic substrate routing can multiply productivity by 100 while maintaining quality comparable to manual work. Automation is especially valuable when encapsulating multiple chips with thousands of electrical and physical constraints.
Socionext plans to use the platform to integrate signal, power, and thermal analysis into its encapsulation and PCB workflows. Schneider Electric highlights another potential: capturing the accumulated knowledge of experienced engineers for reuse in future decisions.
This knowledge transfer is one of the most challenging promises to realize. Organizational rules are often undocumented, and many decisions depend on exceptions, experience, or relationships that systems may interpret incompletely.
AuraStack is part of a broader family of Cadence agents. ChipStack focuses on digital chip design, InnoStack on custom and analog design, and ViraStack on verification. AuraStack covers the flow from silicon to encapsulation and PCB.
| Agentic Platform | Main Area |
|---|---|
| ChipStack | Digital chip design |
| InnoStack | Analog and custom design |
| ViraStack | Verification |
| AuraStack | Advanced encapsulation and PCB |
Cadence claims this catalog is the first complete agentic stack covering all electronic design phases. The commercial advantage would be keeping data, constraints, and decisions within a related set of tools. The risk is increasing dependency on a single provider for several critical phases.
AuraStack’s commercial release is planned for 2026, but Cadence has not specified an exact date, pricing, or initial feature set. It also has not clarified whether all agents and analyses will be included in one license or require additional modules.
The platform does not eliminate manufacturing capacity shortages nor does it alone accelerate TSMC’s fabrication lines. Its primary goal is to reduce design, simulation, and validation cycles before sending a board or encapsulation into production.
This work is becoming more critical as industry integrates more chips into each system. AI has increased demand for accelerators but also complicates their connection, power, and cooling. Cadence wants agents to intervene precisely in this space, where poor physical decisions can negate some of the silicon-level performance gains.
Frequently Asked Questions
What is Cadence AuraStack AI Super Agent?
It is an agentic platform for designing advanced printed circuit boards and encapsulations. Coordinates planning, routing, simulation, and validation within Allegro AI Studio.
Can it design a board without engineers?
No. It automates operations and suggests alternatives but still requires requirements, constraints, validation, and expert decisions.
What is AuraStack’s relationship with Nvidia and TSMC?
Nvidia uses Cadence workflows to design AI infrastructure systems. TSMC collaborates on automation for 3DFabric encapsulations.
When will AuraStack be available?
Cadence plans to release it in 2026, but no specific date or pricing has been announced.
via: businesswire
