AMD is preparing a specialized version of its EPYC processors for 2027 to act as the host CPU in artificial intelligence systems, and a cooling manufacturer has just revealed a detail AMD hadn’t published yet: Verano, also known as EPYC 9006 LP, will use the SB1 socket. Dynatron has added a heatsink to its catalog that explicitly identifies compatibility with these processors, adding a new piece of the puzzle around a platform designed to work alongside large numbers of accelerators.
AMD Verano and the SB1 socket: the key facts in 30 seconds
- Verano is the codename for the AMD EPYC 9006 LP chips aimed at AI host nodes.
- The platform arrives in 2027 with up to 72 Zen 6 cores and clock speeds of up to 5 GHz.
- AMD has planned for LPDDR5X memory through replaceable SOCAMM2 modules.
- Dynatron identifies the SB1 socket for the first time and is already preparing an active heatsink for 4U servers.
- Verano will compete in the same AI host CPU category where NVIDIA is positioning its Vera.
The SB1 reveal doesn’t come from AMD, but from Dynatron. The thermal solutions maker has published the SB1-4U-ACTIVE (TBD) model, still with several specifications pending, and its product page explicitly states that it’s designed for AMD EPYC Verano on Socket SB1. Dynatron’s own site is already promoting its solutions’ compatibility with this platform.
It’s a detail that might seem minor, but it confirms that Verano will use a different platform from conventional EPYC 9006 chips. AMD uses SP7 and SP8 for its sixth-generation Venice models, while Verano has been positioned from the start as a specific variant for artificial intelligence systems with different priorities around memory and connectivity to accelerators.
AMD has officially confirmed a good part of Verano’s features. The company presents it as a CPU for AI host nodes, meant to keep accelerator utilization high and improve system-level performance. It’s expected to arrive in 2027.
Verano Shifts the Priority: Less General-Purpose CPU, More AI
The idea behind EPYC 9006 LP isn’t to compete directly with the higher-core-count EPYC chips. AMD has created several variants within its sixth generation to cover different needs, and Verano occupies a specific spot: the CPU that sits alongside accelerators in AI servers and racks.
In this kind of infrastructure, GPUs handle most of the heavy computation, but they need a host system capable of preparing data, running code, coordinating tasks and keeping the workflow moving. If the CPU doesn’t deliver information fast enough, part of the accelerators’ capacity can go unused.
That’s why AMD has designed Verano around a different combination. The platform will offer up to 72 Zen 6 cores, clock speeds of up to 5 GHz, LPDDR5X memory and 112 Gb/s xGMI connectivity for communication between the CPU and accelerators.
The company is also putting that LPDDR5X memory on SOCAMM2 modules. This format makes it possible to use low-power memory in pluggable modules, instead of necessarily relying on LPDDR memory soldered directly to the board. AMD specifically highlights SOCAMM2’s serviceability as one of the advantages for data centers.
The choice makes sense in an environment where every component’s power draw matters. A host CPU doesn’t necessarily need the same memory capacity as a top-tier general-purpose server CPU, but it does need to move data quickly and do so within a reasonable power budget.
AMD has described Verano as a solution for rack-scale AI systems and says the goal is to keep accelerator utilization high. The company hasn’t yet published the full lineup of models or all their specifications.
Dynatron Exposes the SB1
The newest information comes from the cooling manufacturer. Dynatron has registered the SB1-4U-ACTIVE, an active heatsink that still appears as a provisional product, with its maximum power rating listed as TBD, meaning yet to be determined.
The product page does, however, offer plenty of data about the thermal solution. The heatsink measures 128.05 × 106.6 × 130.7 millimeters and combines aluminum fins, a vapor chamber and heat pipes. Its fan can reach 6,000 RPM and deliver up to 91.7 CFM of airflow.
This data doesn’t make it possible to determine Verano’s power consumption. In fact, Dynatron hasn’t yet published the maximum power the assembly can dissipate, so it wouldn’t be correct to use the cooler’s design to calculate the TDP of the future EPYC 9006 LP chips.
What the product page does make clear is the relationship between the two products. Dynatron literally writes that the solution is compatible with AMD EPYC Verano on Socket SB1. It’s the first public reference found that identifies the socket’s name.
AMD, for its part, still doesn’t show SB1 as an official designation on its public pages dedicated to EPYC 9006 LP. That’s why it’s worth distinguishing between what the chipmaker has already confirmed and what Dynatron has revealed.
There also isn’t enough basis to claim that the “B” in SB1 indicates a BGA package, as some analyses have suggested. That interpretation is a hypothesis based solely on the name. Publishing the socket’s name alone doesn’t make it possible to determine whether the processor will be replaceable, soldered to the board, or mounted some other way.
The Comparison With NVIDIA Vera Comes Down to the Host CPU
Verano’s arrival coincides with a similar strategy from NVIDIA, whose Vera Rubin NVL72 platform has already shown strong early performance results. NVIDIA developed Vera as a CPU specifically aimed at the work that supports artificial intelligence: running code, analysis, orchestration, data processing and other tasks that keep an AI infrastructure running.
NVIDIA Vera uses 88 custom Olympus cores, LPDDR5X memory and a second-generation NVLink-C2C connection to communicate with GPUs. NVIDIA puts Vera’s memory bandwidth at up to 1.2 TB/s and the bidirectional bandwidth of its CPU-GPU connection at up to 1.8 TB/s.
The comparison helps clarify what AMD is trying to do with Verano. The battle isn’t limited to each CPU’s core count. System performance also depends on memory, the connection to accelerators, power consumption, and AMD’s broader push to fit EPYC chips into every layer of AI infrastructure, including the ability to keep GPUs busy.
On that front, AMD is betting on Zen 6, LPDDR5X, SOCAMM2 and xGMI. NVIDIA uses its Olympus cores, LPDDR5X and NVLink-C2C. These are different designs chasing a similar goal: turning the CPU into a piece specifically built to support large deployments of accelerators.
Verano has yet to arrive, and AMD hasn’t revealed all its models or the platform’s final performance. For now, what’s confirmed is an EPYC CPU with up to 72 cores and 5 GHz, LPDDR5X through SOCAMM2, and 112 Gb/s xGMI connectivity, aimed at AI host nodes. Dynatron has now added the SB1 socket detail and shown that the cooling ecosystem is already preparing hardware for this platform.
The next pieces of information still missing are precisely what will make it possible to weigh this proposal against Vera: power consumption, the number of memory channels in commercial configurations, CPU performance, effective bandwidth and the price of complete systems. The socket’s name is no longer a mystery, but a good part of the platform is still waiting to be unveiled.
Frequently asked questions
What is AMD Verano?
Verano is the codename for the AMD EPYC 9006 LP, a sixth-generation processor family designed as a host CPU for artificial intelligence systems.
How many cores will AMD Verano have?
AMD has indicated that Verano will come in configurations with up to 72 Zen 6 cores and clock speeds of up to 5 GHz.
What socket will AMD Verano use?
Dynatron has revealed that EPYC Verano chips will use the SB1 socket by publishing a heatsink compatible with “AMD EPYC Verano on Socket SB1.” AMD hasn’t yet publicly detailed all the features of this platform.
What memory will Verano use?
AMD has confirmed support for LPDDR5X through SOCAMM2 modules. This format allows for pluggable modules and makes maintenance easier compared with LPDDR memory that’s soldered in place.
