Alibaba brings Qwen to its RISC-V XuanTie C950 and reduces its dependence on GPUs

Alibaba continues to bring together two parts of its technological strategy that until recently followed separate paths: its AI models and its own processors. The XuanTie C950, its high-performance RISC-V architecture introduced in March, can now run Qwen models natively, a step that allows the company to propose systems where it controls a much larger part of the supply chain, from the model and software to the CPU and its specialized accelerators.

Key points about Alibaba, Qwen, and RISC-V in 20 seconds

  • The XuanTie C950 is a 64-bit RISC-V design intended for servers, cloud, edge, and AI applications.
  • It can be configured with up to eight cores per cluster and reach 3.2 GHz.
  • It includes vector extensions and can connect to Alibaba’s developed matrix engine, TPE.
  • The platform already runs Qwen models natively, expanding options beyond GPUs for certain inference tasks.
  • Alibaba confirmed validation on 5 nm technology, though it has not officially named TSMC as the manufacturer.

The significance of this move isn’t just in demonstrating that a RISC-V CPU can replace a Nvidia GPU outright. That generalization isn’t valid. The point is that Alibaba is gradually building a platform where the processor can be tailored to the software, and vice versa, software can be designed around the processor.

This approach is well-known in the industry. Apple has been designing chips, operating systems, and applications together for years; Google develops its TPUs around its AI needs; Amazon Web Services offers Graviton, Trainium, and Inferentia. Nvidia has taken integration even further, centered on CUDA, its GPUs, interconnects, and complete systems.

Alibaba also aims to have more of its own components.

XuanTie C950 takes RISC-V toward servers and AI

XuanTie C950 was unveiled by DAMO Academy, Alibaba’s research arm, in March 2026. It is part of a new generation of designs that try to extend RISC-V beyond embedded systems and low-power devices.

RISC-V is an open instruction set architecture that allows processor development without dependency on proprietary architectures like Arm.

This doesn’t mean that designing a RISC-V processor is free. Building a competitive core, verifying it, developing tools, manufacturing the silicon, and maintaining all related software still require significant investments. The advantage is another: it offers much more freedom to customize the architecture for specific needs.

And Alibaba is leveraging precisely that capability.

The C950 implements the RVA23 profile and uses a superscalar, out-of-order execution architecture. It can decode up to eight instructions and features a 16-stage pipeline. Alibaba has also worked on branch prediction, data prefetching, and a configurable cache hierarchy.

FeatureXuanTie C950
Architecture64-bit RISC-V
ProfileRVA23
Max frequency announced3.2 GHz
OrganizationUp to 8 cores per cluster
Decoding8 instructions
Pipeline16 stages
InterconnectAXI4 / AMBA CHI
AI ExtensionsVector extensions + TPE/AME integration
Manufacturing processValidated in 5 nm
Target applicationsCloud, edge, servers, and AI

The company also announced a performance exceeding 22 SPECint2006 per GHz, with over 70 points at maximum frequency. As with all such figures provided by manufacturers, these numbers do not directly translate to actual application performance.

The key is in the matrix engine

A conventional CPU can perform AI inference, but the matrix multiplications that dominate these workloads benefit greatly from specialized hardware.

That’s why the C950 doesn’t rely solely on its general-purpose cores.

Alibaba designed an Attached Matrix Extension (AME) that connects the processor to its Tensor Processing Engine (TPE). This enables matrix operations to be offloaded to hardware specifically optimized for them.

This approach is especially compelling for inference tasks.

Not all workloads require large GPU clusters handling thousands of concurrent requests. Private applications, enterprise servers, and edge deployments may benefit more from an integrated, controllable, and sufficiently fast platform.

That’s the niche Alibaba is targeting with the C950.

Preliminary tests show the platform can run a Qwen model with 27 billion parameters at around 30 tokens per second and a time-to-first-token (TTFT) of 1.9 seconds.

These results will need independent validation and more details about quantization, memory configuration, and the system used before they can be directly compared to GPUs or specialized accelerators.

However, the broader message is clear: RISC-V is beginning to handle workloads that a few years ago seemed reserved almost exclusively for x86, Arm, and proprietary accelerators.

Alibaba hasn’t confirmed TSMC produces the C950

Another key point is where it is manufactured.

Alibaba confirmed in March that the XuanTie C950 was validated on a 5 nm process, but did not publicly disclose the foundry. Industry reports from Nikkei and later TrendForce suggest TSMC as a possible manufacturer.

Therefore, claiming outright that “TSMC manufactures the XuanTie C950” goes beyond what has been officially confirmed. For now, this should be considered industry-sourced information.

This distinction is particularly important given the US export restrictions on advanced technology to China.

Alibaba can design a RISC-V-based architecture and develop its own accelerators, but manufacturing those designs with advanced processes remains a different matter.

Architectural independence doesn’t automatically mean manufacturing independence.

Qwen + XuanTie: Alibaba begins to control more layers

The addition of Qwen to the C950 indicates where the project might head.

Alibaba develops the Qwen model family. It also operates Alibaba Cloud, manages large data centers, designs semiconductors through T-Head, and works on RISC-V architectures.

If all these layers are integrated effectively, Alibaba can tune each layer around the others.

A model can be optimized for specific instructions. The compiler can leverage particular processor extensions. The architecture can incorporate units designed around the operations models typically perform.

This is the same reason why vertical integration is so valuable for Nvidia.

CUDA didn’t emerge after GPUs took over AI. Its software ecosystem, libraries, tools, accelerators, interconnects, and complete systems have been crucial in maintaining that lead.

Alibaba is still far from having a globally dominant ecosystem like Nvidia’s, but it is building several of these layers.

This doesn’t make the C950 a GPU replacement

It’s important to distinguish between technical capacity and commercial strategy here.

Just because Qwen can run on a XuanTie platform doesn’t mean Alibaba intends to replace its GPUs with RISC-V processors.

GPUs and specialized accelerators continue to offer significant advantages when performing multiple inferences simultaneously or training models with hundreds of billions of parameters.

The C950 might be more suitable for other workloads.

Private inference, edge computing, enterprise applications with lower concurrency, and systems where CPU and specialized accelerators share resources are some of the scenarios Alibaba envisions.

Another possibility is using C950 alongside AI accelerators within the same data center.

In this scenario, RISC-V does not replace GPUs but becomes a part of a heterogeneous infrastructure.

RISC-V faces its most challenging test yet

For years, RISC-V has grown mainly from the ground up.

Microcontrollers, embedded systems, storage, IoT, and specialized chips have allowed the architecture to scale without directly competing with the most powerful processors from Intel, AMD, and Arm.

Servers present a different challenge.

It’s not enough to have a fast CPU. An entire ecosystem of operating systems, hypervisors, compilers, databases, libraries, observability tools, and enterprise applications is required.

Alibaba is also working on this part. XuanTie supports tools like GNU, LLVM, and QEMU, while Linux has been expanding its compatibility with RISC-V for years.

Artificial intelligence may also offer an unusual opportunity to accelerate that transition.

Many new workloads are not tied to decades of legacy software. Building inference services around containers, Linux, and open models today can be less complex than porting decades-old enterprise applications developed for x86.

That’s why Alibaba’s experiment matters beyond a single processor.

The question isn’t only whether XuanTie C950 can run Qwen — that’s already demonstrated. The real issue is how far a RISC-V platform can go when the company controls the AI model, compiler, part of the hardware, and the cloud infrastructure where it runs.

If this approach succeeds, RISC-V could find in AI inference one of the pathways it’s sought for years to definitively enter data centers.

Frequently Asked Questions

What is Alibaba XuanTie C950?

It’s a 64-bit RISC-V processor architecture developed by Alibaba for high-performance workloads, cloud, edge, and AI. It can work with Alibaba’s specialized matrix acceleration technologies, AME and TPE.

Can XuanTie C950 run Qwen models without a GPU?

Alibaba demonstrates Qwen inference running on its RISC-V platform with specific acceleration. However, this doesn’t mean it can replace GPUs in all workloads, especially in training or highly concurrent inference.

Is the XuanTie C950 manufactured by TSMC in 5 nm?

Alibaba has confirmed C950 was validated on a 5 nm process, but has not officially identified the manufacturer. Industry sources cited by Nikkei and TrendForce suggest TSMC, but it remains unconfirmed officially.

Why does Alibaba favor RISC-V?

RISC-V allows architecture customization without dependence on proprietary ISAs like x86 or Arm. For Alibaba, it’s especially attractive because it enables tailoring processors, accelerators, and software around its AI and cloud workloads.

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