AMD leveraged its Advancing AI 2026 conference in San Francisco to unveil a comprehensive platform aimed at competing for large-scale artificial intelligence deployments. The company is no longer just competing in terms of processors or accelerators: it combines the new EPYC “Venice” with Zen 6 architecture, the GPU Instinct MI455X, Pensando networking, ROCm software, and Helios, its first rack-scale AI infrastructure design.
The key points of AMD Advancing AI 2026 in 30 seconds
- EPYC “Venice” will debut Zen 6, with up to 256 cores and fabricated with TSMC’s 2-nanometer process.
- Instinct MI455X will feature 432 GB of HBM4 memory and up to 40 TFLOPS in FP4.
- Helios combines 72 MI455X GPUs and 18 Venice CPUs within a single compute domain.
- AMD promises up to 30% more tokens per dollar than NVIDIA Vera Rubin NVL72, according to its own estimates.
- OpenAI, Anthropic, Meta, and Microsoft are already working on deployments or validations of the platform.
The presentation signals a significant strategic shift for AMD. For years, the company primarily competed by delivering EPYC CPUs and Instinct accelerators for integration into third-party systems. Helios expands this focus: it defines how all the components of an AI rack should be connected, powered, cooled, and managed.
The goal is to provide large datacenters with a complete alternative to NVIDIA platforms, supported by open standards like UALink, Ultra Ethernet, and Open Rack Wide, rather than relying solely on proprietary interconnects.
EPYC Venice takes Zen 6 up to 256 cores
The sixth-generation EPYC processors, known as Venice, will be central to the new infrastructure. AMD has already started ramping up production at TSMC’s facilities and presents these as the first high-performance compute processors to reach this phase with Taiwan Semiconductor’s advanced 2-nanometer process.
The family will utilize Zen 6 architecture and offer configurations with up to 256 cores and 512 threads per socket, a jump from the maximum 192 cores of the current EPYC Turin based on Zen 5 and Zen 5c. AMD also announces memory bandwidth up to 1.6 TB/sec and PCIe 6.0 connectivity for accelerators, storage, and next-generation networking.
Venice is particularly aimed at the so-called agentic AI. While GPUs handle the most intensive parts of models, CPUs continue coordinating agents, preparing data, managing databases, running tools, and keeping accelerators busy.
AMD claims that the sixth-generation EPYC will enable more agents per watt, dollar, and rack. These comparisons should be regarded as manufacturer claims until actual systems are available and independent testing is conducted.
Venice will not be a single processor but a family tailored to different infrastructure profiles. Variants will include higher frequency per core, high-density models, and configurations adapted for cloud, enterprise, and HPC environments.
Instinct MI455X boosts memory and bandwidth
The other major component announced in San Francisco is AMD Instinct MI455X, based on the CDNA 5 architecture, which will anchor Helios.
Each GPU will include 432 GB of HBM4 memory and deliver up to 23.3 TB/sec of bandwidth, based on AMD’s reference configuration. The company estimates its peak performance at 40 petaflops in FP4, a precision often used for large-scale AI model serving.
| Feature | AMD Instinct MI455X |
|---|---|
| Architecture | CDNA 5 |
| Memory | Up to 432 GB HBM4 |
| Bandwidth | Up to 23.3 TB/sec |
| FP4 Performance | Up to 40 petaflops |
| Main Use | AI training and inference |
AMD asserts that MI455X can achieve up to 34 times the token throughput of MI355X in certain DeepSeek-V4-Flash tests, while reducing costs per million tokens by up to 18 times. These figures are based on internal tests with projected precisions, interactivity levels, and cloud pricing as estimated by AMD itself.
Memory is a key argument. Larger models, extended context windows, and multi-user systems require storing increasing parameters and data close to the GPU. Higher HBM capacity reduces data movement between nodes and allows more active loads within the same system.
Helios transforms the entire rack into an AI system
Helios is the piece that unites AMD’s new generation. A rack integrates 72 Instinct MI455X accelerators, spread across 18 compute trays, along with 18 EPYC Venice processors, Pensando networking, liquid cooling, and ROCm software environment.
The complete setup delivers 31 TB of HBM4 memory, 2.9 exaflops in FP4, and 1.4 exaflops in FP8. It also features 260 TB/sec internal bandwidth connecting the GPUs, and 43 TB/sec for inter-rack scalability.
| AMD Helios | Reported Specs |
|---|---|
| GPUs per rack | 72 Instinct MI455X |
| CPUs per rack | 18 EPYC Venice |
| HBM4 memory | 31 TB |
| FP4 compute | 2.9 exaflops |
| FP8 compute | 1.4 exaflops |
| Internal bandwidth | 260 TB/sec |
| Inter-rack bandwidth | 43 TB/sec |
Helios directly competes with NVIDIA Vera Rubin NVL72. AMD claims its design offers up to 15% more computational capacity for AI, 50% more HBM memory, and 50% more scalability bandwidth.
It also promises up to 30% more tokens per dollar in certain inference workloads. Once again, these are AMD’s modeled estimates against published specifications of the competing platform, not independent benchmarks from deployed systems.
Open approach versus NVIDIA’s control
AMD’s difference is not only in the numbers. Helios uses UALink over Ethernet to communicate its accelerators, technologies from the Ultra Ethernet Consortium to connect racks, and the Open Rack Wide design presented by Meta to the Open Compute Project.
In contrast, NVIDIA employs a more integrated suite of proprietary technologies, including NVLink and NVSwitch. This tight control allows optimized hardware-software integration but also locks the customer into a single vendor’s architecture.
AMD aims to persuade hyperscalers that they can obtain an integrated platform without sacrificing shared standards. In theory, this enables combining components from different manufacturers and maintaining greater flexibility to adapt infrastructure.
ROCm is another part of this challenge. AMD claims its platform supports PyTorch, TensorFlow, and JAX, along with tools for distributed inference. However, compatibility with these environments does not guarantee that workloads designed for CUDA can be ported without modifications.
Software ecosystem remains a key advantage for NVIDIA. AMD has improved ROCm and has backing from major laboratories, but must demonstrate that its environment offers stability, documentation, libraries, and tools comparable to those of CUDA in real-world projects.
OpenAI, Anthropic, Meta, and Microsoft prepare deployments
AMD showcased at the event that Helios is more than just a technical prototype. Anthropic plans to deploy up to 2 gigawatts of GPU MI455X capacity and collaborate with AMD to improve ROCm through Claude.
OpenAI is working with AMD on optimizing GPT-class workloads and expects to start deploying Helios during Q4 2026, with increased deployments in 2027.
Meta is already validating the new EPYC processors in its labs and testing workloads on Helios. Microsoft is also preparing systems based on the platform, including new VMs with Venice and Pensando networking technologies. Clients like Oracle, Vultr, HPE, Lenovo, and Supermicro are among those supporting the design.
This support underscores that the AI race will not only depend on the fastest chips. It will also rely on the capacity to produce thousands of accelerators, guarantee HBM4 memory availability, deploy high-bandwidth networks, and maintain an ecosystem of software capable of harnessing the full potential of the hardware.
Advancing AI 2026 makes clear AMD’s ambition: to transition from an alternative CPU and GPU supplier to providing the complete architecture for future AI factories. Helios still needs to prove its advantages over Rubin in production, but it elevates the competition with NVIDIA to a much broader scale than just accelerators.
Frequently Asked Questions
What is AMD Helios?
It is AMD’s first rack-scale AI infrastructure design, integrating EPYC Venice CPUs, 72 MI455X accelerators, Pensando networks, cooling, and ROCm software.
How many cores will the EPYC Venice have?
The Zen 6-based family will offer configurations with up to 256 cores and 512 threads per socket.
How much memory does the Instinct MI455X incorporate?
Each accelerator can include up to 432 GB of HBM4 memory, with a full Helios rack reaching 31 TB.
Will AMD Helios be faster than NVIDIA Vera Rubin?
AMD claims it will provide higher compute capacity, more memory, and more tokens per dollar in certain configurations. These figures are based on manufacturer estimates and need validation through actual deployment and testing.
via: amd
