Intel Could Manufacture Up to 90% of Nova Lake Chips with Its 18A Node

Intel may be preparing a significant change in the manufacturing of Nova Lake, its upcoming generation of processors for laptops and desktops. According to estimates attributed to KeyBanc, the company could produce internally between 80% and 90% of the tiles of compute using Intel 18A, significantly reducing the volume initially reserved for TSMC.

This move, still not confirmed by Intel, does not mean that 90% of all Nova Lake components will be manufactured in its facilities. The figure refers to the block that integrates the CPU cores, while other elements of the modular processor could continue coming from external factories. The performance and capacity percentages shared by analysts also remain to be verified.

Key points of the potential Nova Lake change in 20 seconds

  • Intel would internally manufacture between 80% and 90% of Nova Lake’s compute tiles.
  • The initial plan reportedly reserved between 60% and 70% of that volume for TSMC N2.
  • The portion produced by Intel would use its 18A process.
  • Neither company has publicly confirmed these percentages.
  • Analysts attribute the change to improved manufacturing yields of 18A.
  • The 85% yield figure is based on estimates, not Intel-published data.
  • Nova Lake is still scheduled for launch at the end of 2026.
  • Manufacturing more units internally could improve Intel’s margins.
  • It would also turn Nova Lake into a much larger-scale test than Panther Lake.
  • Other tiles, such as graphics or I/O, might still depend on TSMC.
  • Switching between 18A and N2 designs requires different physical versions of the same chip.
  • Intel’s foundry contracts with AMD, Nvidia, OpenAI, and others are not yet confirmed.

The most significant takeaway is not that Intel has discarded TSMC—something that doesn’t seem part of the plan—but that its 18A process might be ready to handle a much larger share of production. Nova Lake will be a high-volume family covering mobile and desktop devices, while Panther Lake has served as the first commercial platform showcasing 18A in laptops. Intel maintains Nova Lake’s launch for late 2026.

A rumor that completely shifts the Intel-TSMC dynamic

Initial reports about Nova Lake suggested a dual-sourcing strategy. Intel would design the compute tile for both its 18A process and TSMC’s N2, using the Taiwanese manufacturer to cover most of the volume and mitigate risks from potential issues in its own fabs.

In that scenario, TSMC might have received around 60-70% of the orders, with Intel Foundry handling the rest. The latest estimate flips this: between 80-90% of compute tiles could come from Intel, leaving TSMC as a secondary manufacturing source and capacity reserve.

It’s important to treat this as supply chain information, not an official announcement. Intel has not publicly detailed which Nova Lake variants will use 18A, which might rely on N2, nor how volume will be distributed between laptops and desktops.

Previous reports indicated that designs for Nova Lake prepared for TSMC N2 existed, within a modular architecture comprising compute, graphics, I/O, and other components produced through different processes. This tile-based design allows for distributed manufacturing but does not make Intel and TSMC nodes interchangeable without additional work.

A physical version designed for TSMC N2 cannot be sent directly to an Intel 18A fab without modifications. Each process uses distinct cell libraries, design rules, power structures, densities, and electrical characteristics. The same logical core design can be adapted to both but requires different physical implementations and validation processes.

Therefore, it’s unlikely Intel suddenly moved a finished chip from TSMC to its fabs. A more plausible explanation is that the company developed both variants from the beginning and is now adjusting the planned volume split between them.

Versions might also differ in performance or size. Intel could assign certain tile models or sizes to 18A, others to N2, based on yields, costs, and capacity. Until the full architecture is unveiled, talking about a complete family transfer remains premature.

The 85% performance assumption needs context

KeyBanc estimates that Intel’s 18A process may have achieved roughly 85% yield, up from 65% in the previous quarter. It also places TSMC N2 near 90% and Samsung SF2 between 50-60%.

These figures are unconfirmed by manufacturers and should not be compared directly as results from a common test. Yield depends on chip size and complexity, acceptable defect levels, production stage, and what constitutes a valid unit.

A wafer used for small test chips might show a high percentage, but a compute tile larger than 100mm² is more likely to contain defects. Different foundries might publish or leak different percentages, but process quality may be closer than the numbers suggest.

Intel acknowledged in 2025 that 18A was progressing slower than desired. Panther Lake production was enough for launch but not yet at full margin levels. The company expected incremental yield improvements throughout 2026, aiming to reach industry-normal levels in 2027.

Early known figures were much lower; Reuters sources in early 2025 estimated approximately 10% of Panther Lake chips to be fully functional in initial phases. This cannot be directly compared to the current estimated 85%, as that may refer to the final yield of a complete product, not just node defect levels. Still, it illustrates Intel’s heavy reliance on rapid fabrication improvements.

Panther Lake provided Intel with initial commercial experience with 18A. Its CPU tile uses the internal process, while other blocks rely on Intel 3 or external TSMC processes. Nova Lake will be a larger challenge, involving more product categories and requiring many wafers.

Why Intel needs to produce Nova Lake in its own fabs

This shift would have implications beyond the processor’s origin. Intel competes in two related areas: designing chips to sell under its own brand and transforming Intel Foundry into a capable semiconductor manufacturer for external clients.

When Intel outsources key CPU components to TSMC, it pays TSMC’s margins and depends on its manufacturing capacity. Manufacturing internally allows retaining more value, provided yields are sufficiently high.

This is critical. A proprietary process with many defects can be costlier than outsourcing, even if Intel avoids explicit wafer fees. Failed units waste materials, machinery, time, and energy but produce no revenue.

If 18A reaches stable yields, increasing its share in Nova Lake would help utilize fabs fully, distribute fixed costs over more chips, and gradually lower unit costs. Additional wafers also enable process refinement and defect tracking.

There’s an American industrial component as well. Fab 52 in Chandler, Arizona, started manufacturing initial chips with Intel 18A and has become central to Intel’s advanced manufacturing comeback. Intel also develops and produces 18A technology in Oregon.

Estimated current capacity is around 30,000 wafers per month, though this has not been officially confirmed. This might suffice for Panther Lake and early products, but Nova Lake’s larger volume depends on manufacturing more chips within Intel—between 80-90% of total production.

Intel will have to allocate wafers across multiple families. Besides consumer processors, 18A is or will be used for server products like Clearwater Forest and Diamond Rapids, along with government projects and external clients.

Demand exceeding capacity might force prioritization of higher-margin models. Intel has already recognized supply constraints and aims to serve both data center and PC markets.

Having TSMC as a backup remains sensible, even if most chips are produced internally. Dual sourcing mitigates risks of performance issues, failures, capacity delays, or unexpectedly high demand. It also reserves part of 18A for Xeon and higher-margin products.

This modular design approach facilitates that strategy. Intel can produce components with the highest technological value in-house and continue outsourcing others where an advanced node isn’t justified. For example, I/O interfaces are often more economical on mature processes.

Nova Lake will be a more demanding validation than Panther Lake

Panther Lake was significant because it debuted 18A in a commercial product. Nova Lake will be even more critical to prove that the process can support a full, high-volume platform.

Nova Lake must cover laptops and desktops, including a high-performance segment aimed at competing with AMD. Intel has admitted its recent desktop line had gaps and sees Nova Lake as the generation to regain ground by late 2026.

To meet that schedule, initial chip versions should already be in advanced validation stages. The company needs to verify frequency, power consumption, memory compatibility, packaging, and behavior for each variant.

Duplicating a tile design between 18A and N2 adds complexity. Even when these produce the same logical function, they may differ in max clock speeds, power, size, or thermal profile. Intel must classify chips and decide if variants can be sold under the same models or need separate branding.

Yields and quality risks at TSMC also remain. N2 is a new process with high demand from mobile, data center, and PC segments. Reserving capacity is costly, and rushing capacity reduction could leave Intel vulnerable if 18A faces issues during mass production.

External customer confirmations still pending

The KeyBanc report also claims that Intel Foundry has secured projects with AMD, Nvidia, Marvell, Microsoft, Micron, and OpenAI.

No public contracts have been confirmed with these companies, nor details on whether the agreements involve full wafers, testing, small components, advanced packaging, or future nodes.

This distinction is vital. Using Intel’s packaging technology, such as EMIB, doesn’t necessarily mean manufacturing their main GPUs or chips on Intel 18A. Companies can outsource assembly of chiplets made elsewhere, even from TSMC or Samsung.

Rumors also link EMIB and its variants to Nvidia accelerators, Google TPUs, and Amazon’s Trainium. All these claims are yet to be validated by the potential clients.

Intel’s position in advanced packaging is noteworthy. EMIB connects multiple chips with tiny silicon bridges embedded in the substrate, avoiding full interposers like TSMC’s CoWoS. This can attract projects, even if the silicon is fabricated elsewhere.

Securing packaging contracts would be positive, but does not by itself prove Intel Foundry has convinced major designers to use its transistors. Real validation comes when an external customer publicly confirms a large-volume product manufactured with 18A or its evolution 18A-P.

Nova Lake could help achieve this. If Intel produces most of its compute tiles internally, launches on time, and maintains good yields, it will have a much stronger commercial reference than just technical presentations.

The claimed 80-90% internal production share is currently a sign of supply chain confidence, not a guarantee. Success depends on Intel’s ability to make enough functional chips, meet schedules, and stay cost-competitive with TSMC.

Frequently Asked Questions

Will Intel manufacture 90% of all Nova Lake components?
Not according to the report. The percentage refers to the volume of compute tiles. Other blocks in the processor may still be made via TSMC processes.

Is it confirmed that Intel 18A can achieve 85% performance?
No. This is an estimate from KeyBanc. Intel has not published this figure, and yields across different foundries are not directly comparable.

Why would Intel use two different processes for the same chip?
Dual sourcing reduces supply risk and allows volume adjustments based on yields, costs, and capacity at 18A and N2.

Will AMD and Nvidia be customers of Intel Foundry?
There are rumors of possible projects, but no confirmed manufacturing contracts. Some agreements might be limited to advanced packaging.

via: trendforce

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