SK Hynix showcased its next-generation memory solutions for artificial intelligence during Computex 2026. The company revealed an HBM4E solution capable of reaching 48 GB in a 12-layer stack with bandwidths up to 4 TB/s—a leap that anticipates the demands of upcoming accelerators from NVIDIA, AMD, and other data center chip manufacturers.
This development comes amid intense competition for high-bandwidth memory. Over the past two years, AI discussions have largely focused on GPUs, but the reality is more complex: without sufficient HBM, accelerators cannot feed their compute cores at the speeds required by new models. Memory has become one of the most critical bottlenecks in AI infrastructure, alongside power, cooling, and networking capacity.
SK Hynix is positioned strongly in this landscape. According to Counterpoint Research, cited by Reuters, the company controlled approximately 58% of the global HBM market in Q1 2026, ahead of Samsung and Micron, both holding about 21%. As a key supplier for NVIDIA, SK Hynix has become central to the AI supply chain, especially as new systems like Rubin and Rubin Ultra begin to define future requirements.
HBM4E: Higher Density with Fewer Layers
The most striking feature of the demonstration is density. SK Hynix’s HBM4E uses 32 Gb chips—representing a 33% increase over previous configurations. This enables reaching 48 GB with a 12-layer stack, whereas the standard 48 GB HBM4 typically involved 16 layers. In practice, this allows for similar capacity in a more compact structure, reducing packaging complexity and aiding thermal integration.
The second major advancement is bandwidth. SK Hynix’s HBM4E targets speeds of up to 16 Gbps per pin and up to 4 TB/s per stack. This is a significant improvement over HBM4 and an even bigger jump from HBM3E, which currently powers much of the most advanced AI systems. These details were shared at Computex via Wccftech, based on information from SK Hynix’s stand.
| Generation | Highlighted Configuration | Capacity | Maximum Speed | Approximate Bandwidth |
|---|---|---|---|---|
| HBM3E | 12-Hi | 36 GB | up to 9.2–9.8 Gbps | around 1.2 TB/s |
| HBM4 | 16-Hi | 48 GB | up to 11.7 Gbps | about 3 TB/s |
| HBM4E | 12-Hi | 48 GB | up to 16 Gbps | up to 4 TB/s |
The table summarizes the generational shifts, but it’s important to interpret these numbers carefully. In HBM systems, overall performance depends not only on the memory stack but also on interfaces, packaging, base logic, accelerator design, power consumption, thermal management, and validation with clients. Nonetheless, reaching 4 TB/s per stack clearly indicates the direction: AI demands faster data feeding to increasingly powerful chips within the same footprint.
This capability is especially crucial for NVIDIA’s Rubin Ultra platform expected in 2027. Reuters reports that SK Group’s Chairman Chey Tae-won stated at Computex that SK Hynix aims to be a major HBM supplier for Vera Rubin and that the HBM4E road map will depend on customer demand, with NVIDIA as a primary influence at this stage.
Memory Now Shapes AI Accelerator Design
HBM is not conventional memory. It stacks vertically and is integrated very close to the processor using advanced packaging, enabling the transfer of vast data volumes with lower energy per bit compared to other architectures. For training and inference of AI models, this proximity is critical: a processor might have enormous compute power, but if data isn’t delivered promptly, much of that potential remains underutilized.
The shift from HBM3E to HBM4 and HBM4E coincides with a surge in model sizes, extended context windows, multimodal systems, and agents maintaining state longer. Next-generation architectures involve more accelerators per rack, greater memory capacity per system, and faster internal networks—all increasing pressure on memory bandwidth and capacity.
SK Hynix recognizes that boosting speed alone isn’t enough. Scaling production is equally important. Chey Tae-won explained at Computex that the company plans to double wafer capacity over the next five years to meet AI-driven demand. He also warned that memory bottlenecks could persist until 2030 but cautioned against sharp price hikes that could hinder sustainable growth.
This highlights the industry’s dilemma: demand is immense, and memory manufacturers have room to improve prices and margins. Yet, if HBM costs rise excessively, clients may delay projects, tweak configurations, or seek alternative architectures. AI needs memory—just not at prohibitive costs to deployment.
Samsung and Micron are also active. Samsung has reportedly begun sample shipments of HBM4E, according to Reuters, and is working to regain ground in a market where SK Hynix led with HBM3E and their collaboration with NVIDIA. Micron is further investing in HBM applications for AI platforms. Competition will intensify later this decade.
Stacked NAND for AI: SK Hynix’s Other Bet
SK Hynix’s presence at Computex extended beyond HBM. The firm introduced NAND solutions tailored for AI, including AI-N B—a technology that combines stacking and connectivity similar to HBM but with flash storage characteristics. The aim is to offer a middle ground: more capacity than traditional HBM and wider bandwidth than standard SSDs.
This approach aligns with the growing interest in High Bandwidth Flash (HBF), a concept SK Hynix and SanDisk are working to standardize. HBF envisions NAND-based memory designed for AI inference servers, positioned between HBM DRAM and conventional SSDs. Tom’s Hardware explained that HBF aims to deliver significantly more capacity than HBM, at lower cost and power, with different latency profiles, serving as high-bandwidth memory or storage layer.
Understanding the training versus inference distinction is helpful. Training demands maximum bandwidth and low latency to optimize large models. Inference, especially at scale, requires extensive capacity, long context windows, retrieval capabilities, caches, and data from millions of users. Appropriately integrated NAND-based memory, offering sufficient bandwidth, could ease some pressure on HBM systems.
It’s not a direct substitute. HBM and HBF can coexist, with HBM remaining the ultra-fast memory near accelerators, and NAND-based solutions acting as a higher-capacity layer for inference, retrieval, vector searches, or models that don’t fit into DRAM. Recent academic research echoes this direction, exploring 3D NAND architectures for local inference acceleration and large-scale vector searches.
LPCAMM2 and V9 NAND: AI Reaches the Consumer
SK Hynix also introduced products closer to end-users, such as their first LPCAMM2 96 GB module based on LPDDR5X and 1αnm process technology, with speeds up to 9.6 Gbps. Designed for compact platforms, high-performance laptops, and AI-enabled PCs, these modules prioritize low-power, soldered or modular memory solutions over traditional SO-DIMMs.
Furthermore, the company displayed V9 NAND solutions in QLC and TLC variants for compact SSDs and low-power designs. While HBM garners most media attention, these products reflect that AI is driving demand across the entire memory spectrum—from massive data centers with giant accelerators to portable devices and next-generation storage systems.
The clear takeaway is that SK Hynix aims to be more than just a component supplier for NVIDIA. It seeks to cover multiple layers of AI memory needs: HBM for training and high-performance accelerators, advanced NAND for inference and storage, LPCAMM2 for AI PCs, and specialized solutions for servers and compact systems.
The AI race is no longer just about having the fastest chip. It’s also about enabling those chips with sufficient data flow, manufacturing enough memory, packaging it efficiently thermally, and maintaining a resilient supply chain. In this landscape, SK Hynix’s 48 GB HBM4E with 4 TB/s bandwidth is more than a technical showcase; it signals that memory has become a central piece in the geopolitical and economic chess game of artificial intelligence.
Frequently Asked Questions
What did SK Hynix present at Computex 2026?
They showcased a 48 GB HBM4E solution in a 12-layer stack, using 32 Gb chips with speeds up to 16 Gbps per pin and a maximum indicated bandwidth of 4 TB/s.
Why is HBM4E important for AI?
Because AI accelerators need to move huge amounts of data between memory and processors. Greater bandwidth and capacity enable better feeding of next-gen GPUs and chips.
How does it relate to NVIDIA Rubin Ultra?
HBM4E is positioned as a key memory component for future platforms beyond Rubin, like Rubin Ultra. SK Hynix aims to maintain its role as NVIDIA’s main memory supplier for advanced AI systems.
What are AI-N B or HBF?
They’re NAND-based high-bandwidth memory solutions designed to bring more capacity closer to AI compute, primarily for inference. They complement rather than replace HBM.
via: wccftech