Opinion | Should the U.S. subject RISC-V to the same scrutiny China applies to Nvidia?

Peking has opened antitrust and national security investigations against American chip manufacturers — with Nvidia in the crosshairs — while vigorously promoting its own RISC-V ecosystem, the open CPU architecture born at Berkeley. The prevailing thesis in Washington is clear: if China scrutinizes the risks of foreign technology closely, the United States cannot treat RISC-V as a harmless experiment, especially as it begins to feed AI, automotive, data centers and even programs with military links. This article summarizes the arguments of the debate, the risks, and the possible public policy pathways that do not stifle open innovation.

From Nvidia to RISC-V: the regulatory mirror

In recent weeks, Chinese authorities have scrutinized Nvidia (and its H20 chip) over potential and national security risks. Beyond the outcome, the political message is clear: when foreign technology threatens strategic priorities, it is pressured. Conversely, Washington asks, shouldn’t the same principle apply to RISC-V when the architecture consolidates as a workaround for export controls and a component of China’s industrial plan?

The comparison is not coincidental: RISC-V (started in 2010 at the University of California, Berkeley) is not a chip but an open ISA (instruction set architecture) that anyone can implement without licensing fees, unlike Arm or x86. This openness has been a blessing for academia, startups, emerging manufacturers and open hardware projects; it has also allowed China to reduce its dependence on Western proprietary IP without directly violating sanctions: designing “own” chips based on a base not controlled by any US company.

Security argument: from “openness is neutral” to “openness can be a weapon”

The alarm in Washington rests on three ideas:

1. Circumventing controls. The entity lists and export controls work when there are suppliers and intellectual property to restrict. With RISC-V, the base design is public; the differential value shifts to implementation, microarchitecture, toolchains, peripheral IP and, most importantly, manufacturing. This doesn’t make regulation impossible but certainly more challenging.
2. Militarization of the ecosystem. Open sources highlight Chinese government investments (tens of millions in RISC-V projects since 2018), private funding rounds exceeding 1.1 billion and over 2,500 patents filed by Chinese organizations, some linked to military universities. The clear direction is: technological sovereignty and dual-use applications.
3. Software/hardware overlap. The report cited in the article indicates that Chinese actors have produced malicious code exploiting the open software; extrapolating, they ask: why assume open hardware will be treated differently? A single chip with intentional microfaults or silicon-level trojans in a power grid, data center, or weapons system can silently open doors.

The result: if RISC-V becomes ubiquitous without safeguards, the attack surface for critical infrastructure could expand. It’s not about “banning RISC-V,” but about accepting that its governance and supply chain are also national security objectives.

The other side: how to reconcile open innovation and security?

Not everyone supports the “hardening” approach without nuance. Openness has been a driver of US technological leadership for decades (Linux, TCP/IP, open source in AI). RISC-V International (based in Switzerland) insists on its neutrality and on the fact that the standard is global and collaborative. Blocking or stigmatizing an open ISA could:

• Harm US universities and startups prototyping with RISC-V.
• Push innovation away from the US and fragment the ecosystem.
• Reduce visibility into what is built (openness, by definition, allows auditing).

The public policy challenge is delicate: raising the trust bar without killing the dynamism of open hardware.

What can the US do (without breaking the toy)?

A sensible framework combines surgical controls, certification, traceability and investment. Concrete proposals include:

1) Export controls “by implementation,” not the standard

• Extend controls to complementary IP (hard/soft cores, acceleration libraries, firmware, PHYs, proprietary toolchains) when end-use or end-user are restricted, rather than “banning RISC-V”.
• Monitor design services (foundry services, cloud EDA) for sanctioned entities.

2) Trusted certification for silicon RISC-V in critical sectors

• Establish an assessment scheme (think Common Criteria for hardware) with tests for trojans, covert channels, physical resilience and secure firmware.
• Require SBOMs for silicon (list of IP blocks, versions, provenance) and fabrication attestations (factory, lot, mask set).

3) Supply chain traceability

• Trusted labeling from EDA (reproducible toolchains) to foundry (chain of custody), with third-party audits.
• Register foundries and packaging used for chips entering regulated infrastructure.

4) Governance and compliance in open projects

• Strengthen contribution policies at RISC-V International and related repositories, including origin review of sensitive contributions and export compliance controls (without hindering upstream).
• Promote open verification labs (formal verification, fuzzing at RTL/gate level) with public-private funding.

5) Investment and “security by design” alternatives

• Fund projects like OpenTitan, OpenROAD, SSITH (DARPA) and accelerators for open EDA that are auditable.
• Scholarships and contracts for RISC-V implementations with trust tests in sectors such as grid, health, defense (with certification requirements).

6) Cooperation with allies

• Align with EU, Japan, South Korea, UK, Canada on minimum certification and traceability standards for open silicon in critical infrastructure.
• Share threats and indicators regarding hardware trojans and supply chain campaigns.

And the role of big tech?

The original article points to moves like Nvidia porting CUDA to RISC-V. For industry, the policy message should be predictable:

• Freedom to innovate, yes; but with clear compliance rules for SDKs, IP, and services used by restricted entities.
• Guardrails for collaborations with companies/institutes linked to military or intelligence of rival countries.
• Bug bounty and verification programs specific for widely used RISC-V implementations.

Key questions Washington must answer

1. What do we consider “critical RISC-V”? It’s not the same to be a development board in education as a SoC for networks in power infrastructure. The regulatory threshold must be sector-specific and proportional.
2. How do we measure “geopolitical influence” in an open standard? Number of patents? Repository maintenance? Government funding? Transparent metrics will need to be created.
3. What incentives do we give to manufacture “trusted”? Tax credits, priority in public procurement, supply chain risk insurance… if we ask more of industry, we must balance the account.
4. How do we prevent fragmentation of the open ecosystem? Too much caution can lead to isolated forks and duplicated efforts. Multilateral coordination is critical.

Conclusion: Scrutiny yes, gatekeeping no

RISC-V is no longer just an academic exercise: it is a strategic platform where technological sovereignty, AI, industrial IoT and defense converge. China has understood this and is industrializing it. The US cannot ignore the risks or demonize openness that has allowed it to lead for decades. The way forward is to scrutinize without suffocating: certify, trace, audit, invest and coordinate with allies.

If Washington only mimicked Beijing’s move — pressuring rivals while granting free rein to domestic innovation — it would lose what has made it strong: open innovation with high security standards. Balance is possible: clear rules for critical chips and broad pathways for open research to continue advancing… both at home and with confidence.

via: washingtontimes