Meta is reportedly in talks to acquire Rivos, a semiconductor startup focused on chips based on RISC-V — covering everything from AI accelerators to GPUs — according to industry sources. The deal, still unannounced officially, would align with Facebook’s parent company’s strategy to reduce dependence on NVIDIA and to design custom hardware for training and inference of their Llama models and other applications (e.g., Ray-Ban Meta).
If successful, the deal could be valued above $2 billion, based on market estimates placing Rivos in that range after raising $250 million in 2024 for its first AI server chip.
Who is Rivos and why is Meta interested
- Headquarters: Santa Clara (California).
- Focus: SoC and accelerators targeting RISC-V, with ambitions for GPU/AI for data centers.
- Legal history: In 2022, Rivos was
For Meta, acquiring a team with IP, tooling, and talent specialized in RISC-V and acceleration can shorten years on their road map for in-house silicon, currently supported by the Meta Training and Inference Accelerator (MTIA) project — designed with Broadcom and manufactured by TSMC, with limited deployments in some data centers alongside NVIDIA GPUs.
What Meta would gain: control, cost, and alignment with the ‘soft-stack’ Llama
- Less dependency on general-purpose GPUs (NVIDIA) for training/inference, with a growing mix of proprietary silicon and GPUs where sensible.
- Fine-tuning to Meta’s AI stack (Llama, data pipelines, operators, and precisions), optimizing performance per watt and TCO.
- Supply elasticity and resilience against bottlenecks in HBM and advanced packaging, by diversifying suppliers and nodes.
- Intellectual property and talent in RISC-V, an open architecture enabling custom microarchitectures, chiplets, and more flexible licensing than proprietary alternatives.
The push for proprietary silicon follows the lead of Google (TPU), Amazon (Trainium/Inferentia), and Microsoft (Cobalt/Athena): these large hyperscalers integrate software + hardware to gain efficiency and control.
RISC-V for GPU/AI? Opportunities and challenges
RISC-V presents a modular and open ISA, with extensions for vectorization (RVV) and matrix operations that can exploit AI workloads. Rivos aims at designs with compute pipelines and memory architectures tailored to modern deep learning operators (matmul/convolution, attentions, mixed formats), within an environment of chiplets and 2.5D/3D packaging that will be critical for scaling.
Challenges:
- Software ecosystem: compilers, runtimes, kernels, and high-performance libraries (equivalents to cuDNN/cuBLAS/TensorRT) require sustained investment.
- HBM and packaging: capacity and yield in interposers/substrates remain major global bottlenecks.
- Performance: matching or surpassing cutting-edge GPUs demands broad bandwidth, parallelism, and programmability.
For Meta, integrating Rivos would accelerate building this software-hardware stack, leveraging their existing internal frameworks and open source contributions.
Synergies with MTIA (and potential changes)
- Training: currently dominated by GPUs; a RISC-V accelerator could handle specific phases or models (e.g., large-scale inference, preprocessing, embedding) and, over time, target parts of training as the stack matures.
- Inference: a prime candidate for tailored Meta-Rivos chips: specialized operators, aggressive quantization (INT8/FP8/bfloat16), batching, and predictable latency.
- Networking and storage: integration with high-performance NICs, CXL, PCIe 6/7, and coherent memory systems will be key for serving LLMs.
Pricing and regulatory considerations
Market estimates place the deal at over $2 billion (possibly around $3 billion). Any agreement will require regulatory review in the US and likely in other jurisdictions, due to competition concerns and economic security (IP and semiconductor talent transfer). Given the concentrated market for AI GPUs, regulators might examine whether the acquisition reduces options in emerging segments.
What might Meta lose (or risk)?
- Execution risk: integrating a hardware startup into a large organization could slow decision-making and strain talent.
- Capex and timelines: moving from tape-out to mass production takes years; benefits are not immediate.
- Stack complexity: maintaining two or more tracks (external GPUs + proprietary silicon) requires ongoing focus and resources in compilation, kernels, and orchestration.
- Technological risk: competing with NVIDIA in absolute performance is tough; strategy should target specific advantages (cost, serving, internal use).
Implications for the market
- Increased competitive pressure: more hyperscalers with own chips shrink the market for general-purpose GPUs and push designers to differenciate (software, ecosystem, packaging).
- Boost for RISC-V: such a significant purchase would validate RISC-V in data centers, beyond microcontrollers and edge applications.
- Supply chain: higher demand for TSMC/CoWoS/SoIC, HBM, and test equipment; bottlenecks will continue to influence deployment speed.
Signals to monitor
- Official confirmation and terms (price, employee retention, roadmap).
- Interaction with MTIA: whether Rivos joins as a team under the program or as a parallel line (e.g., “GPU-like” vs “accelerator”).
- Silicon milestones: tape-outs, internal benchmarks, TSMC nodes, and packaging.
- Software stack: compilers, runtimes, supported models, and toolchains (quantization, graph optimization).
- Collateral acquisitions: potential purchases of IP (memory, interconnects) or EDA equipment to accelerate development.
Conclusion
The potential acquisition of Rivos by Meta aligns with industry shifts: those serving massive-scale AI seek ownership of the silicon powering their models. RISC-V provides the canvas; Rivos, the brush; Meta, the motive. The challenge is not just to “create another GPU,” but to design the right accelerator for their load and economics, with a stack that truly exploits it. Success could mean lower structural costs, greater control and resilience, and a push that shifts the market away from reliance solely on a single GPU brand.
via: Bloomberg