At the heart of a quiet revolution, two processor design philosophies are engaged in a battle that will shape the future of computing worldwide. On one side, CISC (Complex Instruction Set Computing), represented by Intel and AMD’s ubiquitous x86 processors, maintains its strong dominance in desktops and servers. On the other, RISC (Reduced Instruction Set Computing), led by ARM and the emerging rebel RISC-V, is gaining ground in mobile devices, embedded systems, and increasingly in laptops.
But this isn’t solely a contest based on technical specifications or raw performance. The real battleground is in something more mundane and paradoxically more decisive: software.
The chicken-and-egg paradox of technology
A common challenge for a new instruction set is the lack of CPU designs and software, both of which limit its usability and adoption, as RISC-V’s own documentation explains. This statement condenses decades of lessons learned in the semiconductor industry: no matter how elegant your architecture, if there’s no software to leverage it, it’s pointless.
David Patterson, one of the founders of RISC and co-creator of RISC-V, saw this from the start. When he launched the project in 2010 at the University of California, Berkeley, he knew the battle wouldn’t be won in chip design labs but within development ecosystems and programmer communities.
It’s clear that while ARM is more mature and boasts a larger ecosystem—including more operating systems (Android, GNU/Linux, iOS, macOS, Windows, FreeRTOS, RISC OS, etc.) and software built for its ISA—as well as more hardware tailored to it, this ecosystem advantage isn’t accidental: it took decades to build.
The weight dragging RISC-V down
Despite promising advances, RISC-V faces an uncomfortable reality. Support for RISC-V is minimal, while support for ARM is extensive. As a relatively new CPU platform, RISC-V has very limited software support and development environments.
This isn’t just a technical limitation. Ian Ferguson of SiFive, a key commercial advocate of RISC-V, admits that while much software work has been completed, there’s still a long way to go for the RISC-V community. His company prioritizes efforts based on their customers’ needs, but many critical applications remain unoptimized for RISC-V.
The numbers tell the story. While ARM maintains its dominance as the most prevalent instruction set architecture (ISA)—covering over 95% of the smartphone market—RISC-V has achieved just over 10 billion deployments across various applications. The scale difference is enormous.
The network effect perpetuating advantages
The tech industry operates under what economists call “network effects”: the value of a platform grows exponentially with each new user. ARM has benefited for decades from this phenomenon. Its mature and expansive ecosystem includes over 180 billion chips shipped globally, supported by a licensing model that has fostered a broad range of products.
This ecosystem isn’t just a collection of companies; it’s an organic network of developers, tools, software libraries, optimized operating systems, mature compilers, and, most importantly, accumulated experience. In contrast, RISC-V is still building its community, with support networks and resources just beginning to solidify.
The slow but steady progress in 2024
Yet, it wouldn’t be fair to paint an entirely bleak picture for RISC-V. In 2024, notable strides were made in software development. Significant improvements to the Linux kernel and toolchains, new targets being enabled, and additional instructions supported have all enhanced the RISC-V software ecosystem.
Crucial areas for progress include vector support for various clients, Linux kernel interrupt controllers, and AI-specific optimizations. A key focus for 2024 has been optimizing software to better leverage RISC-V’s vector instructions.
Companies like NVIDIA are betting heavily on RISC-V. An unofficial estimate suggests that around one billion RISC-V cores were shipped via NVIDIA chips in 2024. Google also announced official support for RISC-V processors in Android 15.
The pitfall of compatibility and legacy weight
While RISC-V endeavors to build its ecosystem from scratch, CISC processors face the opposite problem: the overwhelming weight of legacy. Modern x86 processors from Intel and AMD, despite using a CISC ISA, internally operate similarly to RISC architectures. This hybrid approach allows them to maintain compatibility with decades of software while gaining some RISC efficiency advantages.
However, this comes at a cost. CISC designs have essentially conceded defeat by operating at the hardware level as RISC, translating CISC instructions into micro-operations (micro-ops) akin to RISC, evident in Intel and AMD microprocessors. This translation adds complexity, consumes power, and uses silicon space that could be allocated elsewhere.
The closing window of opportunity
The paradox is that RISC-V has clear technical advantages: it is simpler and more efficient, while ARM is more complex and powerful. Its modular nature allows designers to include only the instructions they need, optimizing for specific applications. Its open-source model cuts licensing costs that traditionally burden ARM and x86.
But these benefits diminish against the inertia of existing software. Until then, early adopters and developers will push RISC-V forward through software innovation, contributing to the architecture’s evolution. The question remains whether they will have enough time before the window of opportunity closes.
The geopolitical challenge complicating everything
As if technical challenges weren’t enough, RISC-V faces geopolitical pressures that could fragment its development. A group of U.S. senators, including Marco Rubio and Mark Warner, is promoting restrictions on the Biden administration regarding architectures developed via RISC-V.
This concern arises because China has formed a consortium of companies and research institutes aiming to develop chips based on RISC-V architecture. U.S. officials worry that such restrictions could lead to divergent standards, incompatible solutions across markets, and logistical hurdles.
Hardware’s reality: promising but limited
On the hardware front, the situation remains mixed. Most readily available RISC-V systems are painfully slow, and higher-performance or feature-rich options are much harder to find.
This creates a vicious cycle: without broadly available competitive hardware, convincing developers to invest in optimizing software for RISC-V is difficult. Without optimized software, investing in more powerful hardware becomes hard to justify.
However, there are hopeful signs. Canonical announced the DC-ROMA RISC-V Laptop II, a laptop with an octa-core RISC-V processor that will soon ship with Ubuntu Linux. Framework Computers also revealed plans to collaborate with DeepComputing on a RISC-V motherboard for its Framework Laptop 13.
Time’s factor: the race against the clock?
The fundamental question isn’t whether RISC-V is technically superior — which many believe it is — but whether it will have enough time to build a competitive ecosystem before ARM and x86’s established advantages become insurmountable.
RISC-V is making rapid progress, and in a few years, it might reach parity. Yet, “a few years” in technology can be an eternity, especially when competitors are not standing still.
ARM continues to evolve with successive generations like A-76, A-77, A-78, Cortex-X1, and Cortex-X2, while Intel and AMD refine their hybrid CISC-RISC architectures. The window for RISC-V to reach competitive parity isn’t endless.
More than a technical battle: an ecosystem war
What we’re witnessing goes beyond a simple competition between processor architectures. It’s a war of development models: open-source versus proprietary, flexibility versus compatibility, disruptive innovation versus incremental evolution.
The success of each platform has been heavily influenced by the richness of its software ecosystem. You can’t do much with a Ferrari if you can’t leverage it meaningfully.
This reflection from Isaac Chute, RISC-V International’s Ecosystem Director, encapsulates the core challenge: building not just better processors but complete ecosystems that enable developers to create competitive software.
The verdict: a battle that will span decades
The contest between RISC and CISC, today exemplified by RISC-V, ARM, and x86, is far from over. RISC-V holds fundamental advantages regarding efficiency, flexibility, and cost, but faces the daunting task of developing a software ecosystem from the ground up in a world where compatibility and existing support reign supreme.
The RISC vs. CISC battle doesn’t have a clear winner, as both architectures are tailored to solve specific problems in different contexts. But one thing remains certain: the balance between complexity, efficiency, and compatibility will continue to steer processor design innovation.
Ultimately, software — not hardware — will decide who rules the future of computing. And in that fight, RISC-V still has a long way to go. The question isn’t whether RISC will eventually surpass CISC but whether RISC-V can overcome its software deficit before it’s too late.
Time, as always in technology, will be the ultimate judge.